ATMEGA128-16AU Atmel, ATMEGA128-16AU Datasheet - Page 293

• Manufacturer Part Number: ATMEGA128-16AU
• Description: IC AVR MCU 128K 16MHZ 5V 64TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA128-16AU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 128KB (64K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP, 64-VQFP
• Processor Series: ATMEGA128x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• Interface Type: 2-Wire, JTAG, SPI, USART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 53
• Number Of Timers: 4
• Operating Supply Voltage: 4.5 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Controller Family/series: AVR MEGA
• No. Of I/o's: 53
• Eeprom Memory Size: 4096Byte
• Ram Memory Size: 4KB
• Cpu Speed: 16MHz
• Rohs Compliant: Yes
• For Use With: ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEMATSTK501 - ADAPTER KIT FOR 64PIN AVR MCUATSTK500 - PROGRAMMER AVR STARTER KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

2467M–AVR–11/04
Table 120. Pin Name Mapping (Continued)
Table 121. Pin Values Used to Enter Programming Mode
Table 122. XA1 and XA0 Coding
Table 123. Command Byte Bit Coding
Table 124. No. of Words in a Page and no. of Pages in the Flash
Signal Name in
Programming Mode
PAGEL
BS2
DATA
XA1
64K words (128K bytes)
0
0
1
1
Command Byte
Flash Size
XA0
1000 0000
0100 0000
0010 0000
0001 0000
0001 0001
0000 1000
0000 0100
0000 0010
0000 0011
PAGEL
0
1
0
1
XA1
XA0
BS1
Pin
Action when XTAL1 is Pulsed
Load Flash or EEPROM Address (High or low address byte determined by BS1)
Load Data (High or Low data byte for Flash determined by BS1)
Load Command
No Action, Idle
Pin Name
PB7-0
PD7
PA0
Page Size
128 words
Command Executed
Chip Erase
Write Fuse bits
Write Lock bits
Write Flash
Write EEPROM
Read Signature Bytes and Calibration byte
Read Fuse and Lock bits
Read Flash
Read EEPROM
I/O
I/O
I
I
Prog_enable[3]
Prog_enable[2]
Prog_enable[1]
Prog_enable[0]
PCWORD
PC[6:0]
Function
Program Memory and EEPROM data Page Load
Byte Select 2 (“0” selects low byte, “1” selects 2’nd
high byte)
Bi-directional Data bus (Output when OE is low)
Symbol
No. of Pages
512
ATmega128
PCPAGE
PC[15:7]
Value
0
0
0
0
PCMSB
15
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