ATMEGA128-16AU Atmel, ATMEGA128-16AU Datasheet - Page 44

IC AVR MCU 128K 16MHZ 5V 64TQFP

ATMEGA128-16AU

Manufacturer Part Number
ATMEGA128-16AU
Description
IC AVR MCU 128K 16MHZ 5V 64TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA128-16AU

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Processor Series
ATMEGA128x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
2-Wire, JTAG, SPI, USART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
53
Number Of Timers
4
Operating Supply Voltage
4.5 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Controller Family/series
AVR MEGA
No. Of I/o's
53
Eeprom Memory Size
4096Byte
Ram Memory Size
4KB
Cpu Speed
16MHz
Rohs Compliant
Yes
For Use With
ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEMATSTK501 - ADAPTER KIT FOR 64PIN AVR MCUATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Standby Mode
Extended Standby Mode
Table 18. Active Clock Domains and Wake Up Sources in the Different Sleep Modes
Notes:
44
Sleep
Mode
Idle
ADC
Noise
Reduction
Power-
down
Power-
save
Standby
Extended
Standby
1. External Crystal or resonator selected as clock source
2. If AS
3. Only INT3:0 or level interrupt INT7:4
(1)
(1)
ATmega128
clk
CPU
0
bit in ASSR is set
Active Clock Domains
clk
FLASH
clk
X
IO
clk
asynchronous timer should be considered undefined after wake-up in Power-save mode
if AS0 is 0.
This sleep mode basically halts all clocks except clk
chronous modules, including Timer/Counter0 if clocked asynchronously.
When the SM2..0 bits are 110 and an External Crystal/Resonator clock option is
selected, the SLEEP instruction makes the MCU enter Standby mode. This mode is
identical to Power-down with the exception that the Oscillator is kept running. From
Standby mode, the device wakes up in 6 clock cycles.
When the SM2..0 bits are 111 and an external crystal/resonator clock option is selected,
the SLEEP instruction makes the MCU enter Extended Standby mode. This mode is
identical to Power-save mode with the exception that the Oscillator is kept running.
From Extended Standby mode, the device wakes up in six clock cycles.
X
X
ADC
clk
X
X
X
X
ASY
(2)
(2)
Main Clock
Enabled
Source
X
X
X
X
Oscillators
Enabled INT7:0
Timer
Osc
X
X
X
X
(2)
(2)
(2)
(2)
X
X
X
X
X
X
(3)
(3)
(3)
(3)
(3)
Address
Match
TWI
X
X
X
X
X
X
ASY
Wake Up Sources
Timer
, allowing operation only of asyn-
X
X
X
X
(2)
(2)
0
EEPROM
Ready
SPM/
X
X
2467M–AVR–11/04
ADC
X
X
Other
I/O
X

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