ATMEGA128-16AU Atmel, ATMEGA128-16AU Datasheet - Page 12

• Manufacturer Part Number: ATMEGA128-16AU
• Description: IC AVR MCU 128K 16MHZ 5V 64TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA128-16AU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 128KB (64K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP, 64-VQFP
• Processor Series: ATMEGA128x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• Interface Type: 2-Wire, JTAG, SPI, USART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 53
• Number Of Timers: 4
• Operating Supply Voltage: 4.5 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Controller Family/series: AVR MEGA
• No. Of I/o's: 53
• Eeprom Memory Size: 4096Byte
• Ram Memory Size: 4KB
• Cpu Speed: 16MHz
• Rohs Compliant: Yes
• For Use With: ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEMATSTK501 - ADAPTER KIT FOR 64PIN AVR MCUATSTK500 - PROGRAMMER AVR STARTER KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Stack Pointer
RAM Page Z Select Register –
RAMPZ
12
ATmega128
The Stack is mainly used for storing temporary data, for storing local variables and for
storing return addresses after interrupts and subroutine calls. The Stack Pointer Regis-
ter always points to the top of the Stack. Note that the Stack is implemented as growing
from higher memory locations to lower memory locations. This implies that a Stack
PUSH command decreases the Stack Pointer.
The Stack Pointer points to the data SRAM stack area where the Subroutine and Inter-
rupt Stacks are located. This Stack space in the data SRAM must be defined by the
program before any subroutine calls are executed or interrupts are enabled. The Stack
Pointer must be set to point above $60. The Stack Pointer is decremented by one when
data is pushed onto the Stack with the PUSH instruction, and it is decremented by two
when the return address is pushed onto the Stack with subroutine call or interrupt. The
Stack Pointer is incremented by one when data is popped from the Stack with the POP
instruction, and it is incremented by two when data is popped from the Stack with return
from subroutine RET or return from interrupt RETI.
The AVR Stack Pointer is implemented as two 8-bit registers in the I/O space. The num-
ber of bits actually used is implementation dependent. Note that the data space in some
implementations of the AVR architecture is so small that only SPL is needed. In this
case, the SPH Register will not be present.
• Bits 7..1 – Res: Reserved Bits
These are reserved bits and will always read as zero. When writing to this address loca-
tion, write these bits to zero for compatibility with future devices.
• Bit 0 – RAMPZ0: Extended RAM Page Z-pointer
The RAMPZ Register is normally used to select which 64K RAM Page is accessed by
the Z-pointer. As the ATmega128 does not support more than 64K of SRAM memory,
this register is used only to select which page in the program memory is accessed when
the ELPM/SPM instruction is used. The different settings of the RAMPZ0 bit have the
following effects:
Note that LPM is not affected by the RAMPZ setting.
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
RAMPZ0 = 0:
RAMPZ0 = 1:
SP15
SP7
R/W
R/W
15
7
0
0
R
7
–
0
Program memory address $0000 - $7FFF (lower 64K bytes) is
accessed by ELPM/SPM
Program memory address $8000 - $FFFF (higher 64K bytes) is
accessed by ELPM/SPM
SP14
SP6
R/W
R/W
––
14
R
6
0
0
6
0
SP13
SP5
R/W
R/W
13
R
5
–
0
5
0
0
SP12
SP4
R/W
R/W
12
R
4
–
0
4
0
0
SP11
SP3
R/W
R/W
R
11
3
–
0
3
0
0
SP10
R/W
R/W
SP2
R
10
2
–
0
2
0
0
R/W
R/W
SP9
SP1
R
1
–
0
9
1
0
0
RAMPZ0
R/W
R/W
SP8
SP0
R/W
2467M–AVR–11/04
8
0
0
0
0
0
RAMPZ
SPH
SPL