ATMEGA128-16AU Atmel, ATMEGA128-16AU Datasheet - Page 145

• Manufacturer Part Number: ATMEGA128-16AU
• Description: IC AVR MCU 128K 16MHZ 5V 64TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA128-16AU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 128KB (64K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP, 64-VQFP
• Processor Series: ATMEGA128x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• Interface Type: 2-Wire, JTAG, SPI, USART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 53
• Number Of Timers: 4
• Operating Supply Voltage: 4.5 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Controller Family/series: AVR MEGA
• No. Of I/o's: 53
• Eeprom Memory Size: 4096Byte
• Ram Memory Size: 4KB
• Cpu Speed: 16MHz
• Rohs Compliant: Yes
• For Use With: ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEMATSTK501 - ADAPTER KIT FOR 64PIN AVR MCUATSTK500 - PROGRAMMER AVR STARTER KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Definitions
Timer/Counter Clock
Sources
Counter Unit
2467M–AVR–11/04
inactive when no clock source is selected. The output from the clock select logic is
referred to as the timer clock (clk
The double buffered Output Compare Register (OCR2) is compared with the
Timer/Counter value at all times. The result of the compare can be used by the wave-
form generator to generate a PWM or variable frequency output on the Output Compare
Pin (OC2). See “Output Compare Unit” on page 146. for details. The compare match
event will also set the compare flag (OCF2) which can be used to generate an output
compare interrupt request.
Many register and bit references in this document are written in general form. A lower
case “n” replaces the Timer/Counter number, in this case 2. However, when using the
register or bit defines in a program, the precise form must be used (i.e., TCNT2 for
accessing Timer/Counter2 counter value and so on).
The definitions in Table 63 are also used extensively throughout the document.
Table 63. Definitions
The Timer/Counter can be clocked by an internal or an external clock source. The clock
source is selected by the clock select logic which is controlled by the clock select
(CS22:0) bits located in the Timer/Counter Control Register (TCCR2). For details on
c l oc k s ou r c e s a n d p re s c al er , s e e “ T i m e r/ C o u nt e r3 , Ti me r /C ou n te r 2, a n d
Timer/Counter1 Prescalers” on page 142.
The main part of the 8-bit Timer/Counter is the programmable bi-directional counter unit.
Figure 62 shows a block diagram of the counter and its surroundings.
Figure 62. Counter Unit Block Diagram
Signal description (internal signals):
BOTTOM
MAX
TOP
count
direction
DATA BUS
TCNTn
The counter reaches the BOTTOM when it becomes 0x00.
The counter reaches its MAXimum when it becomes 0xFF (decimal 255).
The counter reaches the TOP when it becomes equal to the highest
value in the count sequence. The TOP value can be assigned to be the
fixed value 0xFF (MAX) or the value stored in the OCR2 Register. The
assignment is dependent on the mode of operation.
Increment or decrement TCNT2 by 1.
Select between increment and decrement.
direction
count
clear
bottom
T2
Control Logic
).
top
TOVn
(Int.Req.)
clk
Tn
( From Prescaler )
Clock Select
Detector
Edge
ATmega128
Tn
145