ATMEGA128-16AU Atmel, ATMEGA128-16AU Datasheet - Page 292

• Manufacturer Part Number: ATMEGA128-16AU
• Description: IC AVR MCU 128K 16MHZ 5V 64TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA128-16AU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 128KB (64K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP, 64-VQFP
• Processor Series: ATMEGA128x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• Interface Type: 2-Wire, JTAG, SPI, USART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 53
• Number Of Timers: 4
• Operating Supply Voltage: 4.5 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Controller Family/series: AVR MEGA
• No. Of I/o's: 53
• Eeprom Memory Size: 4096Byte
• Ram Memory Size: 4KB
• Cpu Speed: 16MHz
• Rohs Compliant: Yes
• For Use With: ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEMATSTK501 - ADAPTER KIT FOR 64PIN AVR MCUATSTK500 - PROGRAMMER AVR STARTER KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Parallel Programming
Parameters, Pin
Mapping, and
Commands
Signal Names
292
ATmega128
This section describes how to parallel program and verify Flash Program memory,
EEPROM Data memory, Memory Lock bits, and Fuse bits in the ATmega128. Pulses
are assumed to be at least 250 ns unless otherwise noted.
In this section, some pins of the ATmega128 are referenced by signal names describing
their functionality during parallel programming, see Figure 135 and Table 120. Pins not
described in the following table are referenced by pin names.
The XA1/XA0 pins determine the action executed when the XTAL1 pin is given a posi-
tive pulse. The bit coding is shown in Table 122.
When pulsing WR or OE, the command loaded determines the action executed. The dif-
ferent Commands are shown in Table 123.
Figure 135. Parallel Programming
Table 120. Pin Name Mapping
Signal Name in
Programming Mode
RDY/BSY
OE
WR
BS1
XA0
XA1
RDY/BSY
PAGEL
+12 V
BS2
BS1
XA0
XA1
WR
OE
Pin Name
PD1
PD2
PD3
PD4
PD5
PD6
PD1
PD2
PD3
PD4
PD5
PD6
PD7
RESET
XTAL1
GND
PA0
I/O
O
I
I
I
I
I
Function
0: Device is busy programming, 1: Device is ready
for new command
Output Enable (Active low)
Write Pulse (Active low)
Byte Select 1 (“0” selects low byte, “1” selects high
byte)
XTAL Action Bit 0
XTAL Action Bit 1
PB7 - PB0
AVCC
VCC
+5V
+5V
DATA
2467M–AVR–11/04