ATMEGA128-16AU Atmel, ATMEGA128-16AU Datasheet - Page 242

IC AVR MCU 128K 16MHZ 5V 64TQFP

ATMEGA128-16AU

Manufacturer Part Number
ATMEGA128-16AU
Description
IC AVR MCU 128K 16MHZ 5V 64TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA128-16AU

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Processor Series
ATMEGA128x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
2-Wire, JTAG, SPI, USART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
53
Number Of Timers
4
Operating Supply Voltage
4.5 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Controller Family/series
AVR MEGA
No. Of I/o's
53
Eeprom Memory Size
4096Byte
Ram Memory Size
4KB
Cpu Speed
16MHz
Rohs Compliant
Yes
For Use With
ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEMATSTK501 - ADAPTER KIT FOR 64PIN AVR MCUATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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ADC Conversion Result
242
ATmega128
After the conversion is complete (ADIF is high), the conversion result can be found in
the ADC Result Registers (ADCL, ADCH).
For single ended conversion, the result is
where V
ence (see Table 97 on page 244 and Table 98 on page 244). 0x000 represents ground,
and 0x3FF represents the selected reference voltage minus one LSB.
If differential channels are used, the result is
where V
input pin, GAIN the selected gain factor, and V
result is presented in two’s complement form, from 0x200 (-512d) through 0x1FF
(+511d). Note that if the user wants to perform a quick polarity check of the results, it is
sufficient to read the MSB of the result (ADC9 in ADCH). If this bit is one, the result is
negative, and if this bit is zero, the result is positive. Figure 119 shows the decoding of
the differential input range.
Table 96 shows the resulting output codes if the differential input channel pair (ADCn -
ADCm) is selected with a gain of GAIN and a reference voltage of V
IN
POS
is the voltage on the selected input pin and V
is the voltage on the positive input pin, V
ADC
=
(
----------------------------------------------------------------------- -
V
ADC
POS
=
V
NEG
V
--------------------------
V
IN
REF
V
) GAIN 512
REF
1024
REF
the selected voltage reference. The
NEG
REF
the voltage on the negative
the selected voltage refer-
REF
.
2467M–AVR–11/04

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