ATMEGA128-16AU Atmel, ATMEGA128-16AU Datasheet - Page 132

• Manufacturer Part Number: ATMEGA128-16AU
• Description: IC AVR MCU 128K 16MHZ 5V 64TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA128-16AU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 128KB (64K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP, 64-VQFP
• Processor Series: ATMEGA128x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• Interface Type: 2-Wire, JTAG, SPI, USART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 53
• Number Of Timers: 4
• Operating Supply Voltage: 4.5 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Controller Family/series: AVR MEGA
• No. Of I/o's: 53
• Eeprom Memory Size: 4096Byte
• Ram Memory Size: 4KB
• Cpu Speed: 16MHz
• Rohs Compliant: Yes
• For Use With: ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEMATSTK501 - ADAPTER KIT FOR 64PIN AVR MCUATSTK500 - PROGRAMMER AVR STARTER KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

132
ATmega128
Table 59 shows the COMnx1:0 bit functionality when the WGMn3:0 bits are set to the
fast PWM mode
Table 59. Compare Output Mode, Fast PWM
Note:
Table 59 shows the COMnx1:0 bit functionality when the WGMn3:0 bits are set to the
phase correct and frequency correct PWM mode.
Table 60. Compare Output Mode, Phase Correct and Phase and Frequency Correct
PWM
Note:
COMnA1/COMnB1/
COMnA1/COMnB/
COMnC0
COMnC1
A
COMnA1/COMnB1/COMnC1 is set. In this case the compare match is ignored, but the
set or clear is done at TOP. See “Fast PWM Mode” on page 122. for more details.
A
COMnA1/COMnB1//COMnC1 is set. See “Phase Correct PWM Mode” on page 124. for
more details.
0
0
1
1
0
0
1
1
special
special
case
case
COMnA0/COMnB0/
COMnA0/COMnB0/
occurs
occurs
COMnC0
COMnC0
0
1
0
1
0
1
0
1
when
when
OCRnA/OCRnB/OCRnC
OCRnA/OCRnB/OCRnC
Normal port operation, OCnA/OCnB/OCnC
disconnected.
WGMn3:0 = 15: Toggle OCnA on Compare
Match, OCnB/OCnC disconnected (normal
port operation).
For all other WGMn settings, normal port
operation, OCnA/OCnB/OCnC
disconnected.
Clear OCnA/OCnB/OCnC on compare
match, set OCnA/OCnB/OCnC at TOP
Set OCnA/OCnB/OCnC on compare match,
clear OCnA/OCnB/OCnC at TOP
Normal port operation, OCnA/OCnB/OCnC
disconnected.
WGMn3:0 = 9 or 14: Toggle OCnA on
Compare Match, OCnB/OCnC disconnected
(normal port operation).
For all other WGMn settings, normal port
operation, OCnA/OCnB/OCnC
disconnected.
Clear OCnA/OCnB/OCnC on compare
match when up-counting. Set
OCnA/OCnB/OCnC on compare match
when downcounting.
Set OCnA/OCnB/OCnC on compare match
when up-counting. Clear
OCnA/OCnB/OCnC on compare match
when downcounting.
Description
Description
equals
equals
2467M–AVR–11/04
TOP
TOP
and
and