ATMEGA128-16AU Atmel, ATMEGA128-16AU Datasheet - Page 377
ATMEGA128-16AU
Manufacturer Part Number
ATMEGA128-16AU
Description
IC AVR MCU 128K 16MHZ 5V 64TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets
1.ATMEGA128-16AU.pdf
(26 pages)
2.ATMEGA128-16AU.pdf
(385 pages)
3.ATMEGA128-16AU.pdf
(389 pages)
Specifications of ATMEGA128-16AU
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Processor Series
ATMEGA128x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
2-Wire, JTAG, SPI, USART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
53
Number Of Timers
4
Operating Supply Voltage
4.5 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Controller Family/series
AVR MEGA
No. Of I/o's
53
Eeprom Memory Size
4096Byte
Ram Memory Size
4KB
Cpu Speed
16MHz
Rohs Compliant
Yes
For Use With
ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEMATSTK501 - ADAPTER KIT FOR 64PIN AVR MCUATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATMEGA128-16AU
Manufacturer:
MITSUBISHI
Quantity:
104
Company:
Part Number:
ATMEGA128-16AU
Manufacturer:
ATMEL
Quantity:
3 340
Part Number:
ATMEGA128-16AU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
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ATmega128 Rev. F
2467M–AVR–11/04
•
•
1. Stabilizing time needed when changing XDIV Register
2. Stabilizing time needed when changing OSCCAL Register
A proposal for solving problems regarding the JTAG instruction IDCODE is presented
below.
Stabilizing time needed when changing XDIV Register
Stabilizing time needed when changing OSCCAL Register
be connected in such way that the ATmega128 is the fist device in the chain.
Update-DR will still not work for the succeeding devices in the boundary scan chain
as long as IDCODE is present in the JTAG Instruction Register, but the Device ID
registered cannot be uploaded in any case.
After increasing the source clock frequency more than 2% with settings in the XDIV
register, the device may execute some of the subsequent instructions incorrectly.
Problem Fix / Workaround
The NOP instruction will always be executed correctly also right after a frequency
change. Thus, the next 8 instructions after the change should be NOP instructions.
To ensure this, follow this procedure:
1.Clear the I bit in the SREG Register.
2.Set the new pre-scaling factor in XDIV register.
3.Execute 8 NOP instructions
4.Set the I bit in SREG
This will ensure that all subsequent instructions will execute correctly.
Assembly Code Example:
CLI
OUT
NOP
NOP
NOP
NOP
NOP
NOP
NOP
NOP
SEI
After increasing the source clock frequency more than 2% with settings in the OSC-
CAL register, the device may execute some of the subsequent instructions
incorrectly.
Problem Fix / Workaround
The behavior follows errata number 1., and the same Fix / Workaround is applicable
on this errata.
IDCODE masks data from TDI input
The public but optional JTAG instruction IDCODE is not implemented correctly
according to IEEE1149.1; a logic one is scanned into the shift register instead of the
TDI input while shifting the Device ID Register. Hence, captured data from the pre-
XDIV, temp
; clear global interrupt enable
; set new prescale value
; no operation
; no operation
; no operation
; no operation
; no operation
; no operation
; no operation
; no operation
; clear global interrupt enable
ATmega128
377
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