ATMEGA128-16AU Atmel, ATMEGA128-16AU Datasheet - Page 103

IC AVR MCU 128K 16MHZ 5V 64TQFP

ATMEGA128-16AU

Manufacturer Part Number
ATMEGA128-16AU
Description
IC AVR MCU 128K 16MHZ 5V 64TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA128-16AU

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Processor Series
ATMEGA128x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
2-Wire, JTAG, SPI, USART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
53
Number Of Timers
4
Operating Supply Voltage
4.5 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Controller Family/series
AVR MEGA
No. Of I/o's
53
Eeprom Memory Size
4096Byte
Ram Memory Size
4KB
Cpu Speed
16MHz
Rohs Compliant
Yes
For Use With
ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEMATSTK501 - ADAPTER KIT FOR 64PIN AVR MCUATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Timer/Counter Register –
TCNT0
Output Compare Register –
OCR0
2467M–AVR–11/04
Table 55. Compare Output Mode, Phase Correct PWM Mode
Note:
• Bit 2:0 – CS02:0: Clock Select
The three clock select bits select the clock source to be used by the Timer/Counter, see
Table 56.
Table 56. Clock Select Bit Description
The Timer/Counter Register gives direct access, both for read and write operations, to
the Timer/Counter unit 8-bit counter. Writing to the TCNT0 Register blocks (removes)
the compare match on the following timer clock. Modifying the counter (TCNT0) while
the counter is running, introduces a risk of missing a compare match between TCNT0
and the OCR0 Register.
The Output Compare Register contains an 8-bit value that is continuously compared
with the counter value (TCNT0). A match can be used to generate an output compare
interrupt, or to generate a waveform output on the OC0 pin.
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
COM01
CS02
0
0
1
1
0
0
0
0
1
1
1
1
1. A special case occurs when OCR0 equals TOP and COM01 is set. In this case, the
COM00
compare match is ignored, but the set or clear is done at TOP. See “Phase Correct
PWM Mode” on page 98 for more details.
CS01
0
1
0
1
R/W
R/W
0
0
1
1
0
0
1
1
7
0
7
0
Description
Normal port operation, OC0 disconnected.
Reserved
Clear OC0 on compare match when up-counting. Set OC0 on compare
match when downcounting.
Set OC0 on compare match when up-counting. Clear OC0 on compare
match when downcounting.
R/W
R/W
6
0
6
0
CS00
0
1
0
1
0
1
0
1
R/W
R/W
5
0
5
0
Description
No clock source (Timer/Counter stopped)
clk
clk
clk
clk
clk
clk
clk
T
T
T0S
T0S
T0S
T0S
T0S
0
0
S
S
/256 (From prescaler)
/1024 (From prescaler)
R/W
R/W
/(No prescaling)
/8 (From prescaler)
/32 (From prescaler)
/64 (From prescaler)
/128 (From prescaler)
4
0
4
0
TCNT0[7:0]
OCR0[7:0]
R/W
R/W
3
0
3
0
R/W
R/W
2
0
2
0
(1)
R/W
R/W
ATmega128
1
0
1
0
R/W
R/W
0
0
0
0
TCNT0
OCR0
103

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