ATMEGA128-16AU Atmel, ATMEGA128-16AU Datasheet - Page 188

• Manufacturer Part Number: ATMEGA128-16AU
• Description: IC AVR MCU 128K 16MHZ 5V 64TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA128-16AU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 128KB (64K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP, 64-VQFP
• Processor Series: ATMEGA128x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• Interface Type: 2-Wire, JTAG, SPI, USART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 53
• Number Of Timers: 4
• Operating Supply Voltage: 4.5 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Controller Family/series: AVR MEGA
• No. Of I/o's: 53
• Eeprom Memory Size: 4096Byte
• Ram Memory Size: 4KB
• Cpu Speed: 16MHz
• Rohs Compliant: Yes
• For Use With: ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEMATSTK501 - ADAPTER KIT FOR 64PIN AVR MCUATSTK500 - PROGRAMMER AVR STARTER KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Using MPCM
188
ATmega128
data frames. When the frame type bit (the first stop or the 9th bit) is one, the frame con-
tains an address. When the frame type bit is zero the frame is a data frame.
The Multi-processor Communication mode enables several slave MCUs to receive data
from a master MCU. This is done by first decoding an address frame to find out which
MCU has been addressed. If a particular slave MCU has been addressed, it will receive
the following data frames as normal, while the other slave MCUs will ignore the received
frames until another address frame is received.
For an MCU to act as a master MCU, it can use a 9-bit character frame format (UCSZ =
7). The ninth bit (TXB8) must be set when an address frame (TXB8 = 1) or cleared when
a data frame (TXB = 0) is being transmitted. The slave MCUs must in this case be set to
use a 9-bit character frame format.
The following procedure should be used to exchange data in Multi-processor Communi-
cation mode:
1. All slave MCUs are in Multi-processor Communication mode (MPCM in UCSRA
2. The master MCU sends an address frame, and all slaves receive and read this
3. Each slave MCU reads the UDR Register and determines if it has been selected.
4. The addressed MCU will receive all data frames until a new address frame is
5. When the last data frame is received by the addressed MCU, the addressed
Using any of the 5- to 8-bit character frame formats is possible, but impractical since the
receiver must change between using n and n+1 character frame formats. This makes
full-duplex operation difficult since the transmitter and receiver uses the same character
size setting. If 5- to 8-bit character frames are used, the transmitter must be set to use
two stop bit (USBS = 1) since the first stop bit is used for indicating the frame type.
Do not use read-modify-write instructions (SBI and CBI) to set or clear the MPCM bit.
The MPCM bit shares the same I/O location as the TXC flag and this might accidentally
be cleared when using SBI or CBI instructions.
is set).
frame. In the slave MCUs, the RXC flag in UCSRA will be set as normal.
If so, it clears the MPCM bit in UCSRA, otherwise it waits for the next address
byte and keeps the MPCM setting.
received. The other slave MCUs, which still have the MPCM bit set, will ignore
the data frames.
MCU sets the MPCM bit and waits for a new address frame from master. The
process then repeats from 2.
2467M–AVR–11/04