ATMEGA128-16AU Atmel, ATMEGA128-16AU Datasheet - Page 380

• Manufacturer Part Number: ATMEGA128-16AU
• Description: IC AVR MCU 128K 16MHZ 5V 64TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA128-16AU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 128KB (64K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP, 64-VQFP
• Processor Series: ATMEGA128x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• Interface Type: 2-Wire, JTAG, SPI, USART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 53
• Number Of Timers: 4
• Operating Supply Voltage: 4.5 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Controller Family/series: AVR MEGA
• No. Of I/o's: 53
• Eeprom Memory Size: 4096Byte
• Ram Memory Size: 4KB
• Cpu Speed: 16MHz
• Rohs Compliant: Yes
• For Use With: ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEMATSTK501 - ADAPTER KIT FOR 64PIN AVR MCUATSTK500 - PROGRAMMER AVR STARTER KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Changes from Rev.
2467G-09/02 to Rev.
2467H-02/03
Changes from Rev.
2467F-09/02 to Rev.
2467G-09/02
Changes from Rev.
2467E-04/02 to Rev.
2467F-09/02
380
ATmega128
7. Updated R
8. Added a proposal for solving problems regarding the JTAG instruction
1. Corrected the names of the two Prescaler bits in the SFIOR Register.
2. Added Chip Erase as a first step under “Programming the Flash” on page 318
3. Removed reference to the “Multipurpose Oscillator” application note and the
4. Corrected OCn waveforms in Figure 52 on page 123.
5. Various minor Timer1 corrections.
6. Added information about PWM symmetry for Timer0 and Timer2.
7. Various minor TWI corrections.
8. Added reference to Table 124 on page 293 from both SPI Serial Programming
9. Added note under “Filling the Temporary Buffer (Page Loading)” on page 282
10. Removed ADHSM completely.
11. Added section “EEPROM Write During Power-down Sleep Mode” on page 23.
12. Updated drawings in “Packaging Information” on page 371.
1. Changed the Endurance on the Flash to 10,000 Write/Erase Cycles.
1. Added 64-pad MLF Package and updated “Ordering Information” on page 370.
2. Added the section “Using all Locations of External Memory Smaller than 64
3. Added the section “Default Clock Source” on page 35.
4. Renamed SPMCR to SPMCSR in entire document.
5. When using external clock there are some limitations regards to change of
6. Added a sub section regarding OCD-system and power consumption in the
IDCODE in “Errata” on page 373.
and “Programming the EEPROM” on page 319.
“32 kHz Crystal Oscillator” application note, which do not exist.
and Self Programming to inform about the Flash Page size.
about writing to the EEPROM during an SPM Page load.
KB” on page 31.
frequency. This is descried in “External Clock” on page 40 and Table 131,
“External Clock Drive,” on page 323.
section “Minimizing Power Consumption” on page 45.
PU
values in “DC Characteristics” on page 321.
2467M–AVR–11/04