ATMEGA128-16AU Atmel, ATMEGA128-16AU Datasheet - Page 135
ATMEGA128-16AU
Manufacturer Part Number
ATMEGA128-16AU
Description
IC AVR MCU 128K 16MHZ 5V 64TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets
1.ATMEGA128-16AU.pdf
(26 pages)
2.ATMEGA128-16AU.pdf
(385 pages)
3.ATMEGA128-16AU.pdf
(389 pages)
Specifications of ATMEGA128-16AU
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Processor Series
ATMEGA128x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
2-Wire, JTAG, SPI, USART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
53
Number Of Timers
4
Operating Supply Voltage
4.5 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Controller Family/series
AVR MEGA
No. Of I/o's
53
Eeprom Memory Size
4096Byte
Ram Memory Size
4KB
Cpu Speed
16MHz
Rohs Compliant
Yes
For Use With
ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEMATSTK501 - ADAPTER KIT FOR 64PIN AVR MCUATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATMEGA128-16AU
Manufacturer:
MITSUBISHI
Quantity:
104
Company:
Part Number:
ATMEGA128-16AU
Manufacturer:
ATMEL
Quantity:
3 340
Part Number:
ATMEGA128-16AU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
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Timer/Counter1 Control
Register C – TCCR1C
Timer/Counter3 Control
Register C – TCCR3C
2467M–AVR–11/04
Table 62. Clock Select Bit Description
If external pin modes are used for the Timer/Countern, transitions on the Tn pin will
clock the counter even if the pin is configured as an output. This feature allows software
control of the counting.
•
•
•
The FOCnA/FOCnB/FOCnC bits are only active when the WGMn3:0 bits specifies a
non-PWM mode. When writing a logical one to the FOCnA/FOCnB/FOCnC bit, an
immediate compare match is forced on the waveform generation unit. The
OCnA/OCnB/OCnC output is changed according to its COMnx1:0 bits setting. Note that
the FOCnA/FOCnB/FOCnC bits are implemented as strobes. Therefore it is the value
present in the COMnx1:0 bits that determine the effect of the forced compare.
A FOCnA/FOCnB/FOCnC strobe will not generate any interrupt nor will it clear the timer
in Clear Timer on Compare Match (CTC) mode using OCRnA as TOP.
The FOCnA/FOCnB/FOCnB bits are always read as zero.
•
These bits are reserved for future use. For ensuring compatibility with future devices,
these bits must be written to zero when TCCRnC is written.
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
CSn2
Bit 7 – FOCnA: Force Output Compare for Channel A
Bit 6 – FOCnB: Force Output Compare for Channel B
Bit 5 – FOCnC: Force Output Compare for Channel C
Bit 4:0 – Reserved Bits
0
0
0
0
1
1
1
1
CSn1
0
0
1
1
0
0
1
1
FOC1A
FOC3A
W
W
7
0
7
0
CSn0
FOC1B
FOC3B
0
1
0
1
0
1
0
1
W
W
6
0
6
0
Description
No clock source. (Timer/Counter stopped)
clk
clk
clk
clk
clk
External clock source on Tn pin. Clock on falling edge
External clock source on Tn pin. Clock on rising edge
FOC1C
FOC3C
I/O
I/O
I/O
I/O
I/O
W
W
5
0
5
0
/1 (No prescaling
/8 (From prescaler)
/64 (From prescaler)
/256 (From prescaler)
/1024 (From prescaler)
R
R
4
–
0
4
–
0
3
–
R
0
3
–
R
0
R
R
2
–
0
2
–
0
ATmega128
R
R
1
–
0
1
–
0
R
R
0
–
0
0
–
0
TCCR1C
TCCR3C
135
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