ATMEGA128-16AU Atmel, ATMEGA128-16AU Datasheet - Page 105

• Manufacturer Part Number: ATMEGA128-16AU
• Description: IC AVR MCU 128K 16MHZ 5V 64TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA128-16AU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 128KB (64K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP, 64-VQFP
• Processor Series: ATMEGA128x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• Interface Type: 2-Wire, JTAG, SPI, USART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 53
• Number Of Timers: 4
• Operating Supply Voltage: 4.5 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Controller Family/series: AVR MEGA
• No. Of I/o's: 53
• Eeprom Memory Size: 4096Byte
• Ram Memory Size: 4KB
• Cpu Speed: 16MHz
• Rohs Compliant: Yes
• For Use With: ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEMATSTK501 - ADAPTER KIT FOR 64PIN AVR MCUATSTK500 - PROGRAMMER AVR STARTER KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

2467M–AVR–11/04
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The Oscillator is optimized for use with a 32.768 kHz watch crystal. Applying an
external clock to the TOSC1 pin may result in incorrect Timer/Counter0 operation.
The CPU main clock frequency must be more than four times the Oscillator
frequency.
When writing to one of the registers TCNT0, OCR0, or TCCR0, the value is
transferred to a temporary register, and latched after two positive edges on TOSC1.
The user should not write a new value before the contents of the Temporary
Register have been transferred to its destination. Each of the three mentioned
registers have their individual temporary register, which means that e.g., writing to
TCNT0 does not disturb an OCR0 write in progress. To detect that a transfer to the
destination register has taken place, the Asynchronous Status Register – ASSR has
been implemented.
When entering Power-save or Extended Standby mode after having written to
TCNT0, OCR0, or TCCR0, the user must wait until the written register has been
updated if Timer/Counter0 is used to wake up the device. Otherwise, the MCU will
enter sleep mode before the changes are effective. This is particularly important if
the Output Compare0 interrupt is used to wake up the device, since the output
compare function is disabled during writing to OCR0 or TCNT0. If the write cycle is
not finished, and the MCU enters sleep mode before the OCR0UB bit returns to
zero, the device will never receive a compare match interrupt, and the MCU will not
wake up.
If Timer/Counter0 is used to wake the device up from Power-save or Extended
Standby mode, precautions must be taken if the user wants to re-enter one of these
modes: The interrupt logic needs one TOSC1 cycle to be reset. If the time between
wake-up and re-entering sleep mode is less than one TOSC1 cycle, the interrupt will
not occur, and the device will fail to wake up. If the user is in doubt whether the time
before re-entering Power-save or Extended Standby mode is sufficient, the following
algorithm can be used to ensure that one TOSC1 cycle has elapsed:
1. Write a value to TCCR0, TCNT0, or OCR0.
2. Wait until the corresponding Update Busy flag in ASSR returns to zero.
3. Enter Power-save or Extended Standby mode.
When the asynchronous operation is selected, the 32.768 kHZ Oscillator for
Timer/Counter0 is always running, except in Power-down and Standby modes. After
a Power-up Reset or wake-up from Power-down or Standby mode, the user should
be aware of the fact that this Oscillator might take as long as one second to stabilize.
The user is advised to wait for at least one second before using Timer/Counter0
after power-up or wake-up from Power-down or Standby mode. The contents of all
Timer/Counter0 Registers must be considered lost after a wake-up from Power-
down or Standby mode due to unstable clock signal upon start-up, no matter
whether the Oscillator is in use or a clock signal is applied to the TOSC1 pin.
Description of wake up from Power-save or Extended Standby mode when the timer
is clocked asynchronously: When the interrupt condition is met, the wake up
process is started on the following cycle of the timer clock, that is, the timer is
always advanced by at least one before the processor can read the counter value.
After wake-up, the MCU is halted for four cycles, it executes the interrupt routine,
and resumes execution from the instruction following SLEEP.
Reading of the TCNT0 Register shortly after wake-up from Power-save may give an
incorrect result. Since TCNT0 is clocked on the asynchronous TOSC clock, reading
TCNT0 must be done through a register synchronized to the internal I/O clock
domain. Synchronization takes place for every rising TOSC1 edge. When waking up
from Power-save mode, and the I/O clock (clk
I/O
) again becomes active, TCNT0 will
ATmega128
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