EP1S10F484I6 Altera, EP1S10F484I6 Datasheet - Page 800

• Manufacturer Part Number: EP1S10F484I6
• Description: IC STRATIX FPGA 10K LE 484-FBGA
• Manufacturer: Altera
• Series: Stratix®r

Specifications of EP1S10F484I6

• Number Of Logic Elements/cells: 10570
• Number Of Labs/clbs: 1057
• Total Ram Bits: 920448
• Number Of I /o: 335
• Voltage - Supply: 1.425 V ~ 1.575 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 484-FBGA
• Family Name: Stratix
• Number Of Logic Blocks/elements: 10570
• # I/os (max): 335
• Frequency (max): 450.05MHz
• Process Technology: 0.13um (CMOS)
• Operating Supply Voltage (typ): 1.5V
• Logic Cells: 10570
• Ram Bits: 920448
• Operating Supply Voltage (min): 1.425V
• Operating Supply Voltage (max): 1.575V
• Operating Temp Range: -40C to 100C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 484
• Package Type: FC-FBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Not Compliant

Using Enhanced Configuration Devices
12–22
Stratix Device Handbook, Volume 2
In local update mode, you would first create the initial programming file
with the factory configuration image and a version of the application
configuration. Subsequently, you can generate partial programming files
to update the application configuration (stored in page 001). Quartus II
CPF can create partial programming files in .hex (Hexadecimal file), JAM,
.jbc (JAM Byte-Code File), and POF formats.
In addition to the two configuration pages, user data or processor code
can also be pre-programmed in the bottom boot and main data areas of
the enhanced configuration device memory. The CPF utility accepts a
HEX input file for the bottom and main data areas, and includes this data
in the POF output file. However, this is only supported for initial
programming file generation. Partial programming file generation for
updating user HEX data is not supported, but can be performed using the
enhanced configuration device external flash interface.
Initial Programming File Generation
The initial programming file includes configuration data for both factory
and application configuration pages. The enhanced configuration device
option’s bits are always located between byte addresses 0x00010000
and 0x0001003F. Also, page 0 always starts at 0x00010040 while its
end address is dependent on the size of the factory configuration data.
The two memory allocation options that exist for the application
configuration are auto addressing and block addressing. In auto
addressing mode, Quartus II automatically allocates memory for the
application configuration. All the configuration memory sectors that are
not used by the page 0 factory configuration are allocated for page 1. The
memory allocated is maximized to allow future versions of the
application configuration to grow and have bigger configuration files
(when the compression feature is enabled). Processor or user data storage
(HEX input file) is only supported by the bottom boot area in auto
addressing mode.
The following steps and screen shot (see
programming file generation with auto addressing mode.
1.
2.
Open the Convert Programming Files window from the File menu.
Select Programmer Object File (*.pof) from the drop-down list
titled Programming File Type.
Figure
12–13) describe initial
Altera Corporation
September 2004