EP1S10F484I6 Altera, EP1S10F484I6 Datasheet - Page 338

IC STRATIX FPGA 10K LE 484-FBGA

EP1S10F484I6

Manufacturer Part Number
EP1S10F484I6
Description
IC STRATIX FPGA 10K LE 484-FBGA
Manufacturer
Altera
Series
Stratix®r
Datasheets

Specifications of EP1S10F484I6

Number Of Logic Elements/cells
10570
Number Of Labs/clbs
1057
Total Ram Bits
920448
Number Of I /o
335
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
484-FBGA
Family Name
Stratix
Number Of Logic Blocks/elements
10570
# I/os (max)
335
Frequency (max)
450.05MHz
Process Technology
0.13um (CMOS)
Operating Supply Voltage (typ)
1.5V
Logic Cells
10570
Ram Bits
920448
Operating Supply Voltage (min)
1.425V
Operating Supply Voltage (max)
1.575V
Operating Temp Range
-40C to 100C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
484
Package Type
FC-FBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Not Compliant

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Enhanced PLLs
Figure 1–15. Spread-Spectrum Circuit Block Diagram
1–28
Stratix Device Handbook, Volume 2
refclk
Spectrum
Counter
Spread
Figure 1–16
different counter values. Since the enhanced PLL switches between two
different m and n values, the result is a straight line between two
frequencies, which gives a linear modulation. The magnitude of
modulation is determined by the ratio of two m/n sets. The percent
spread is determined by:
percent spread = (f
The maximum and minimum VCO frequency is defined as:
f
f
VCOmax
VCOmin
= (m
= (m
2
1
shows a VCO frequency waveform when toggling between
/n
n count1
/n
2
1
)
)
VCOmax
f
f
ref
ref
÷ n
f
VCOmin
)/f
n count2
VCOmax
m count1
= 1 [(m
2
PFD
÷ m
n
Altera Corporation
1
)/(m
m count2
1
July 2005
n
2
)]
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