EP1S10F484I6 Altera, EP1S10F484I6 Datasheet - Page 432

IC STRATIX FPGA 10K LE 484-FBGA

EP1S10F484I6

Manufacturer Part Number
EP1S10F484I6
Description
IC STRATIX FPGA 10K LE 484-FBGA
Manufacturer
Altera
Series
Stratix®r
Datasheets

Specifications of EP1S10F484I6

Number Of Logic Elements/cells
10570
Number Of Labs/clbs
1057
Total Ram Bits
920448
Number Of I /o
335
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
484-FBGA
Family Name
Stratix
Number Of Logic Blocks/elements
10570
# I/os (max)
335
Frequency (max)
450.05MHz
Process Technology
0.13um (CMOS)
Operating Supply Voltage (typ)
1.5V
Logic Cells
10570
Ram Bits
920448
Operating Supply Voltage (min)
1.425V
Operating Supply Voltage (max)
1.575V
Operating Temp Range
-40C to 100C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
484
Package Type
FC-FBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Not Compliant

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Stratix & Stratix GX I/O Standards
4–4
Stratix Device Handbook, Volume 2
Stratix and Stratix GX devices support both input and output levels for
2.5-V LVCMOS operation.
1.8-V LVTTL Normal Voltage Range - EIA/JEDEC Standard
EIA/JESD8-7
The 1.8-V I/O standard is used for 1.8-V LVTTL applications. This
standard defines the DC interface parameters for high-speed, low-
voltage, non-terminated digital circuits driving or being driven by other
1.8-V parts. The input and output voltage ranges are:
Stratix and Stratix GX devices support both input and output levels for
1.8-V LVTTL operation.
1.8-V LVCMOS Normal Voltage Range - EIA/JEDEC Standard
EIA/JESD8-7
The 1.8-V I/O standard is used for 1.8-V LVCMOS applications. This
standard defines the DC interface parameters for high-speed, low-
voltage, non-terminated digital circuits driving or being driven by other
1.8-V devices. The input and output voltage ranges are:
Stratix and Stratix GX devices support both input and output levels for
1.8-V LVCMOS operation.
1.5-V LVCMOS Normal Voltage Range - EIA/JEDEC Standard
JESD8-11
The 1.5-V I/O standard is used for 1.5-V applications. This standard
defines the DC interface parameters for high-speed, low-voltage, non-
terminated digital circuits driving or being driven by other 1.5-V devices.
The input and output voltage ranges are:
The 1.8-V normal range input standards specify an input voltage
range of – 0.5 V
The normal range minimum V
The 1.8-V normal range input standards specify an input voltage
range of – 0.5 V V
The normal range minimum V
The 1.5-V normal range input standards specify an input voltage
range of – 0.5 V V
The normal range minimum V
V
I
I
I
2.5 V.
2.0 V.
2.3 V.
OH
OH
OH
requirement is V
requirement is V
requirement is 1.05 V.
Altera Corporation
CCIO
CCIO
– 0.45 V.
– 0.45 V.
June 2006

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