EP1S10F484I6 Altera, EP1S10F484I6 Datasheet - Page 787

• Manufacturer Part Number: EP1S10F484I6
• Description: IC STRATIX FPGA 10K LE 484-FBGA
• Manufacturer: Altera
• Series: Stratix®r

Specifications of EP1S10F484I6

• Number Of Logic Elements/cells: 10570
• Number Of Labs/clbs: 1057
• Total Ram Bits: 920448
• Number Of I /o: 335
• Voltage - Supply: 1.425 V ~ 1.575 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 484-FBGA
• Family Name: Stratix
• Number Of Logic Blocks/elements: 10570
• # I/os (max): 335
• Frequency (max): 450.05MHz
• Process Technology: 0.13um (CMOS)
• Operating Supply Voltage (typ): 1.5V
• Logic Cells: 10570
• Ram Bits: 920448
• Operating Supply Voltage (min): 1.425V
• Operating Supply Voltage (max): 1.575V
• Operating Temp Range: -40C to 100C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 484
• Package Type: FC-FBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Not Compliant

Altera Corporation
September 2004
RU_Timer
RU_nCONFIG
RU_Clk
Table 12–3. User Configuration Signals To/From Device Core (Part 1 of 2)
Signal Name
Output from the core to the
remote update block
Output from the core to the
remote update block
Output from the core to the
remote update block
To/From Device Core
Figure 12–6. Remote Configuration Registers & Related Data Path
Table 12–3
to/from the device logic array. The remote configuration logic has one
input signal to the device logic array and six output signals from the
device logic array.
RU_Dout
Status Register
Bit4...Bit10
describes the user configuration signals that are driven
Remote System Configuration with Stratix & Stratix GX Devices
Shift Register
RU_shftnhld
Request from the application to reset the user watchdog
timer with its initial count. A falling edge of this signal
triggers a reset of the user watchdog timer.
When driven low, this signal triggers the device to
reconfigure. If requested by the factory configuration, the
application configuration specified in the remote update
control register is loaded. If requested by the application
configuration, the factory configuration is loaded.
Clocks the remote configuration shift register so that the
contents of the status and control registers can be read
out, and the contents of update register can be loaded.
The shift register latches data on the rising edge of the
RU_Clk
Control Logic
Control Register
Update Register
RU_captnupdt
.
Bit16...Bit0
Bit0...Bit16
Device Core
Logic
Stratix Device Handbook, Volume 2
Description
RU_Din
RU_clk
Watchdog
RU_Timer
to Reconfig Logic
Timer
User
RU_nCONFIG
12–9