EP1S10F484I6 Altera, EP1S10F484I6 Datasheet - Page 552

IC STRATIX FPGA 10K LE 484-FBGA

EP1S10F484I6

Manufacturer Part Number
EP1S10F484I6
Description
IC STRATIX FPGA 10K LE 484-FBGA
Manufacturer
Altera
Series
Stratix®r
Datasheets

Specifications of EP1S10F484I6

Number Of Logic Elements/cells
10570
Number Of Labs/clbs
1057
Total Ram Bits
920448
Number Of I /o
335
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
484-FBGA
Family Name
Stratix
Number Of Logic Blocks/elements
10570
# I/os (max)
335
Frequency (max)
450.05MHz
Process Technology
0.13um (CMOS)
Operating Supply Voltage (typ)
1.5V
Logic Cells
10570
Ram Bits
920448
Operating Supply Voltage (min)
1.425V
Operating Supply Voltage (max)
1.575V
Operating Temp Range
-40C to 100C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
484
Package Type
FC-FBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Not Compliant

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DSP Block Overview
DSP Block
Overview
6–2
Stratix Device Handbook, Volume 2
Each Stratix and Stratix GX device has two columns of DSP blocks that
efficiently implement multiplication, multiply accumulate (MAC), and
filtering functions.
surrounding LAB rows. You can configure each DSP block to support:
Figure 6–1. DSP Blocks Arranged in Columns
The multipliers can then feed an adder or an accumulator block,
depending on the DSP block operational mode. Additionally, you can use
the DSP block input registers as shift registers to implement applications
such as FIR filters efficiently. The number of DSP blocks per column
Eight 9
Four 18
One 36
8 LAB
Rows
36 bit multiplier
9 bit multipliers
18 bit multipliers
Figure 6–1
shows one of the columns with
DSP Block
DSP Block
Column
Altera Corporation
July 2005

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