EP1S10F484I6 Altera, EP1S10F484I6 Datasheet - Page 310

• Manufacturer Part Number: EP1S10F484I6
• Description: IC STRATIX FPGA 10K LE 484-FBGA
• Manufacturer: Altera
• Series: Stratix®r

Specifications of EP1S10F484I6

• Number Of Logic Elements/cells: 10570
• Number Of Labs/clbs: 1057
• Total Ram Bits: 920448
• Number Of I /o: 335
• Voltage - Supply: 1.425 V ~ 1.575 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 484-FBGA
• Family Name: Stratix
• Number Of Logic Blocks/elements: 10570
• # I/os (max): 335
• Frequency (max): 450.05MHz
• Process Technology: 0.13um (CMOS)
• Operating Supply Voltage (typ): 1.5V
• Logic Cells: 10570
• Ram Bits: 920448
• Operating Supply Voltage (min): 1.425V
• Operating Supply Voltage (max): 1.575V
• Operating Temp Range: -40C to 100C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 484
• Package Type: FC-FBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Not Compliant

Clock Management
Section I–2
Chapter
1
November 2003, v2.2
October 2003, v2.1
July 2003, v2.0
Date/Version
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Updated the
Updated the
Updated
Updated clock multiplication and division, spread spectrum, and Notes 1
and 8 in Table 1-3.
Updated inclk[1..0] port name in Table 1-4.
Updated ranges for EPLL post-scale and pre-scale dividers on page 1-9
Added 1.8V HSTL support for EPLL in Table 1-6 and 1-13.
New requirement to assert are set signal each PLL when it has to re-
acquire lock on either a new clock after loss of lock (page 1-16)
Corrected input port
chapter.
Updated
Updated text on jitter for spread spectrum on page 1-38.
Removed PLL specifications. See Chapter 4 of Volume 1.
Figure
clkloss
“Lock Detect”
“VCCG & GNDG”
1–14.
description in Table 1-9.
extswitch
Changes Made
section.
section.
to
Stratix Device Handbook, Volume 2
clkswitch
throughout this
Altera Corporation