EP1S10F484I6 Altera, EP1S10F484I6 Datasheet - Page 289

• Manufacturer Part Number: EP1S10F484I6
• Description: IC STRATIX FPGA 10K LE 484-FBGA
• Manufacturer: Altera
• Series: Stratix®r

Specifications of EP1S10F484I6

• Number Of Logic Elements/cells: 10570
• Number Of Labs/clbs: 1057
• Total Ram Bits: 920448
• Number Of I /o: 335
• Voltage - Supply: 1.425 V ~ 1.575 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 484-FBGA
• Family Name: Stratix
• Number Of Logic Blocks/elements: 10570
• # I/os (max): 335
• Frequency (max): 450.05MHz
• Process Technology: 0.13um (CMOS)
• Operating Supply Voltage (typ): 1.5V
• Logic Cells: 10570
• Ram Bits: 920448
• Operating Supply Voltage (min): 1.425V
• Operating Supply Voltage (max): 1.575V
• Operating Temp Range: -40C to 100C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 484
• Package Type: FC-FBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Not Compliant

Stratix Device Handbook, Volume 1
Differential HSTL Specifications
DSP
E
EP1S10 Devices
EP1S20 Devices
Altera Corporation
Block Diagram
Block Interconnect Interface
Block Interface
Block Signal Sources & Destinations
Blocks
Input Register Modes
Input Registers
Multiplier
Pipeline/Post Multiply Register
Column Pin
Row Pin
Column Pin
Configuration
Arranged in Columns
in Stratix Devices
Block
Signed Representation
Sub-Block
Sub-Blocks Using Input Shift Register
Fast Regional Clock External I/O Timing
Global
Regional Clock External I/O Timing
Fast Regional Clock External I/O Timing
Global
Regional Clock External I/O Timing
Fast Regional Clock External I/O Timing
Global
Regional Clock External I/O Timing
2–60
Connections
Parameters
Parameters
Parameters
Parameters
Parameters
Parameters
Parameters
Parameters
for 18 x 18-Bit
for 9 x 9-Bit
2–57
Clock
Clock
Clock
2–57
2–70
2–58
External
External
External
4–36
4–37
4–36
4–37
4–38
4–38
4–39
4–40
2–54
2–59
2–60
2–56
2–55
2–53
2–60
2–71
4–15
I/O
I/O
I/O
2–61
Timing
Timing
Timing
2–73
EP1S25 Devices
EP1S30 Devices
EP1S40 Devices
Row Pin
Column Pin
Row Pin
Column Pin
Row Pin
Column Pin
Row Pin
Fast Regional Clock External I/O Timing
Global
Regional Clock External I/O Timing
Fast Regional Clock External I/O Timing
Global
Regional Clock External I/O Timing
Fast Regional Clock External I/O Timing
Global
Regional Clock External I/O Timing
Fast Regional Clock External I/O Timing
Global
Regional Clock External I/O Timing
Fast Regional Clock External I/O Timing
Global
Regional Clock External I/O Timing
Fast Regional Clock External I/O Timing
Global
Regional Clock External I/O Timing
Parameters
Parameters
Parameters
Parameters
Parameters
Parameters
Parameters
Parameters
Parameters
Parameters
Parameters
Parameters
Parameters
Parameters
Parameters
Parameters
Parameters
Parameters
Parameters
Clock
Clock
Clock
Clock
Clock
Clock
External
External
External
External
External
External
4–39
4–40
4–41
4–41
4–42
4–43
4–42
4–43
4–44
4–44
4–45
4–45
4–45
4–46
4–47
4–47
4–48
4–49
4–48
I/O
I/O
I/O
I/O
I/O
I/O
Index–3
Timing
Timing
Timing
Timing
Timing
Timing