EP1S10F484I6 Altera, EP1S10F484I6 Datasheet - Page 692

IC STRATIX FPGA 10K LE 484-FBGA

EP1S10F484I6

Manufacturer Part Number
EP1S10F484I6
Description
IC STRATIX FPGA 10K LE 484-FBGA
Manufacturer
Altera
Series
Stratix®r
Datasheets

Specifications of EP1S10F484I6

Number Of Logic Elements/cells
10570
Number Of Labs/clbs
1057
Total Ram Bits
920448
Number Of I /o
335
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
484-FBGA
Family Name
Stratix
Number Of Logic Blocks/elements
10570
# I/os (max)
335
Frequency (max)
450.05MHz
Process Technology
0.13um (CMOS)
Operating Supply Voltage (typ)
1.5V
Logic Cells
10570
Ram Bits
920448
Operating Supply Voltage (min)
1.425V
Operating Supply Voltage (max)
1.575V
Operating Temp Range
-40C to 100C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
484
Package Type
FC-FBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Not Compliant

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TriMatrix Memory
TriMatrix
Memory
10–8
Stratix Device Handbook, Volume 2
Figure 10–3. LE Numbering as Shown in the Quartus II Software
TriMatrix memory has three different sizes of memory blocks, each
optimized for a different purpose or application. M512 blocks consist of
512 bits plus parity (576 bits), M4K blocks consist of 4K bits plus parity
(4,608 bits), and M-RAM blocks consist of 512K bits plus parity
(589,824 bits). This new structure differs from APEX II and APEX 20K
devices, which feature uniformly sized embedded system blocks (ESBs)
either 4 Kbits (APEX II devices) or 2 Kbits (APEX 20K devices) large.
Stratix and Stratix GX TriMatrix memory blocks give you advanced
control of each memory block, with features such as byte enables, parity
bit storage, and shift-register mode, as well as mixed-port width support
and true dual-port mode operation.
Altera Corporation
July 2005

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