MC68302EH20C Freescale Semiconductor, MC68302EH20C Datasheet - Page 296

IC MPU MULTI-PROTOCOL 132-PQFP

MC68302EH20C

Manufacturer Part Number
MC68302EH20C
Description
IC MPU MULTI-PROTOCOL 132-PQFP
Manufacturer
Freescale Semiconductor

Specifications of MC68302EH20C

Processor Type
M683xx 32-Bit
Speed
20MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
132-MQFP, 132-PQFP
Family Name
M68000
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
20MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
5V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
132
Package Type
PQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Compliant

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Electrical Characteristics
6-8
4. For power-up, the MC68302 must be held in the reset state for 100 ms to allow stabilization of on-chip circuit. After
5. If the asynchronous input setup (#47) requirement is satisfied for DTACK, the DTACK asserted to data setup
6. When AS and R/W are equally loaded ( 20%), subtract 5 ns from the values given in these columns.
7. The MC68302 will negate BG and begin driving the bus if external arbitration logic negates BR before asserting
8. The minimum value must be met to guarantee proper operation. If the maximum value is exceeded, BG may be
9. This specification is valid only when the RMCST bit is set in the SCR register.
10.Occurs on S0 of SDMA read/write access when the SDMA becomes bus master.
11.Specification may be exceeded during the TAS instruction if the RMCST bit in the SCR is set.
synchronous input using the asynchronous input setup time (#47).
the system is powered up #56 refers to the minimum pulse width required to reset the processor.
time (#31) requirement can be ignored. The data must only satisfy the data-in to clock low setup time (#27) for the
following clock cycle.
BGACK.
reasserted.
MC68302 USER’S MANUAL
MOTOROLA

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