MC68302EH20C Freescale Semiconductor, MC68302EH20C Datasheet - Page 235
MC68302EH20C
Manufacturer Part Number
MC68302EH20C
Description
IC MPU MULTI-PROTOCOL 132-PQFP
Manufacturer
Freescale Semiconductor
Datasheets
1.MC68302AG20C.pdf
(4 pages)
2.MC68302AG20C.pdf
(2 pages)
3.MC68302AG20C.pdf
(13 pages)
4.MC68302EH20C.pdf
(481 pages)
Specifications of MC68302EH20C
Processor Type
M683xx 32-Bit
Speed
20MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
132-MQFP, 132-PQFP
Family Name
M68000
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
20MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
5V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
132
Package Type
PQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Compliant
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- MC68302AG20C PDF datasheet
- MC68302AG20C PDF datasheet #2
- MC68302AG20C PDF datasheet #3
- MC68302EH20C PDF datasheet #4
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TX—Tx Buffer
RBD—Rx Buffer
4.5.14.13 DDCMP Mask Register
The SCC mask register (SCCM) is referred to as the DDCMP mask register when the SCC
is operating as a DDCMP controller. It is an 8-bit read-write register that has the same bit
format as the DDCMP event register. If a bit in the DDCMP mask register is a one, the cor-
responding interrupt in the event register will be enabled. If the bit is zero, the corresponding
interrupt in the event register will be masked. This register is cleared upon reset.
4.5.15 V.110 Controller
V.110 is an ISDN protocol that interfaces non-ISDN terminal equipment into one of the B
channels of the 2B + D basic rate ISDN S-interface. V.110 offers the ability to transmit data
from non-ISDN terminal equipment over one of the B channels through an ISDN to other
non-ISDN terminal equipment. A common application of V.110 rate adaption is providing a
connection between RS-232 based terminal equipment over an ISDN.
Since V.110 uses the B channels, a V.110 application requires that an ISDN call first be set
up over the D channel. This call setup uses the LAPD protocol, which can be implemented
using another SCC in the MC68302 (see 4.5.12 HDLC Controller).
V.110 can adapt slower equipment up to the 64 kbps B channel rate. If the non-ISDN termi-
nal equipment is synchronous, a one- or two-step process is required. If asynchronous
equipment is adapted, a three-step process is required. The standard allows for the adaption
of asynchronous rates up to 19.2 kbps and synchronous rates up to 56 kbps.
Only the third step (RA2) is required for adaption of synchronous 48- and 56-kbps rates
commonly used by synchronous modems. RA1 and RA2 are needed for synchronous rates
of 600, 1200, 2400, 4800, 7200, 9600, 12 kbps, 14.4 kbps, and 19.2 kbps. Asynchronous
terminals require all three steps because rate-adapting asynchronous terminals require the
additional task of compensating for slight underspeed or overspeed of the terminal with re-
spect to the ISDN clock rate. This is why the RA0 function refers to stop-bit manipulation.
Data is transmitted over the ISDN in a defined 80-bit frame format. This frame includes all
data from the terminal (including start and stop bits for the asynchronous terminals) as well
as various framing and control functions.
Another rate adaption protocol, called V.120, is an alternative protocol to V.110. V.120 is an
extension of the LAPD protocol and may be implemented on the MC68302 using an SCC
configured in HDLC mode.
MOTOROLA
A buffer has been transmitted over the DDCMP channel. This bit is set no sooner than at
the beginning of the transmission of the second-to-last data (or CRC) bit in the frame, if
this buffer was the last in a frame. Otherwise, it is set as the last data byte is written to the
transmit FIFO.
A buffer has been received on the DDCMP channel that was not a complete block.
MC68302 USER’S MANUAL
Communications Processor (CP)
4-115
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