MC68302EH20C Freescale Semiconductor, MC68302EH20C Datasheet - Page 272

• Manufacturer Part Number: MC68302EH20C
• Description: IC MPU MULTI-PROTOCOL 132-PQFP
• Manufacturer: Freescale Semiconductor

Specifications of MC68302EH20C

• Processor Type: M683xx 32-Bit
• Speed: 20MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 132-MQFP, 132-PQFP
• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 20MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 5V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 132
• Package Type: PQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

Signal Description
When working with an 8-bit bus (BUSW is low), the data is transferred through the low-order
byte (D7–D0). The high-order byte (D15–D8) is not used for data transfer, but D8-D15 are
outputs during write cycles and are not three-stated.
5.7 BUS CONTROL PINS
The bus control pins are shown in Figure 5-6.
AS—Address Strobe
R/W—Read/Write
UDS/A0—Upper Data Strobe/Address 0
LDS/DS—Lower Data Strobe/Data Strobe
DTACK—Data Transfer Acknowledge
5-8
This bidirectional signal indicates that there is a valid address on the address bus. This
line is an output when the IMP (M68000 core, SDMA or IDMA) is the bus master and is
an input otherwise.
This bidirectional signal defines the data bus transfer as a read or write cycle. It is an out-
put when the IMP is the bus master and is an input otherwise.
This bidirectional line controls the flow of data on the data bus. When using a 16-bit data
bus, this pin functions as upper data strobe (UDS). When using an 8-bit data bus, this pin
functions as A0. When used as A0 (i.e., the BUSW pin is low), then the pin takes on the
timing of the other address pins, as opposed to the strobe timing. This line is an output
when the IMP is the bus master and is an input otherwise.
This bidirectional line controls the flow of data on the data bus. When using a 16-bit data
bus, this pin functions as lower data strobe (LDS). When using an 8-bit data bus, this pin
functions as DS. This line is an output when the IMP (M68000 core, SDMA or IDMA) is
the bus master and is an input otherwise.
This bidirectional signal indicates that the data transfer has been completed. DTACK can
be generated internally in the chip-select logic either for an IMP bus master or for an ex-
ternal bus master access to an external address within the chip-select ranges. It will also
be generated internally during any access to the on-chip dual-port RAM or internal regis-
Figure 5-6. Bus Control Pins
MC68302 USER’S MANUAL
MC68302
AS
DTACK
R/W
UDS / A0
LDS / DS
RMC / IOUT1
IAC
BCLR
MOTOROLA