MC68302EH20C Freescale Semiconductor, MC68302EH20C Datasheet - Page 216

• Manufacturer Part Number: MC68302EH20C
• Description: IC MPU MULTI-PROTOCOL 132-PQFP
• Manufacturer: Freescale Semiconductor

Specifications of MC68302EH20C

• Processor Type: M683xx 32-Bit
• Speed: 20MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 132-MQFP, 132-PQFP
• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 20MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 5V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 132
• Package Type: PQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

Communications Processor (CP)
R—Ready
X—External Buffer
W—Wrap (Final BD in Table)
I—Interrupt
L—Last in Message
TB—Transmit BCS
B—BCS Enable
BR—BCS Reset
4-96
This bit is valid only when the L bit is set.
0 = This buffer is not currently ready for transmission. The user is free to manipulate
1 = The data buffer has been prepared for transmission by the user (but not yet trans-
0 = The buffer associated with this BD is in internal dual-port RAM.
1 = The buffer associated with this BD is in external memory.
0 = This is not the last BD in the Tx BD table.
1 = This is the last BD in the Tx BD table. After this buffer has been used, the CP will
0= No interrupt is generated after this buffer has been serviced.
1= Either TX or TXE in the BISYNC event register will be set when this buffer has been
0 = The last character in the buffer is not the last character in the current block.
1 = The last character in the buffer is the last character in the current block. The trans-
0 = Transmit the SYN1–SYN2 sequence or IDLE (according to the SYNF bit in the BI-
1 = Transmit the BCS sequence after the last character. The BISYNC controller will
0 = Buffer consists of characters to be excluded from the BCS accumulation.
1 = Buffer consists of characters to be included in the BCS accumulation.
0 = The BCS accumulation is not reset.
1 = The transmitter BCS accumulation is reset (used for STX or SOH) before sending
this BD (or its associated buffer). The CP clears this bit after the buffer has been
fully transmitted or after an error condition has been encountered.
mitted). No fields of this BD may be written by the user once this bit is set.
transmit data from the first BD in the table.
serviced by the CP, which can cause an interrupt.
mitter will enter (remain in) normal mode after sending the last character in the buff-
er and the BCS (if enabled).
SYNC mode register) after the last character in the buffer.
also reset the BCS generator after transmitting the BCS sequence.
the data buffer.
The user is required to set the wrap bit in one of the first eight
BDs; otherwise, errant behavior may occur.
MC68302 USER’S MANUAL
NOTE
MOTOROLA