MC68302EH20C Freescale Semiconductor, MC68302EH20C Datasheet - Page 183

• Manufacturer Part Number: MC68302EH20C
• Description: IC MPU MULTI-PROTOCOL 132-PQFP
• Manufacturer: Freescale Semiconductor

Specifications of MC68302EH20C

• Processor Type: M683xx 32-Bit
• Speed: 20MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 132-MQFP, 132-PQFP
• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 20MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 5V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 132
• Package Type: PQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

CT—CTS Lost
Data Length
Tx Buffer Pointer
4.5.11.16 UART Event Register
The SCC event register (SCCE) is called the UART event register when the SCC is operat-
ing as a UART. It is an 8-bit register used to report events recognized by the UART channel
and generate interrupts. On recognition of an event, the UART controller will set the corre-
sponding bit in the UART event register. Interrupts generated by this register may be
masked in the UART mask register.
The UART event register is a memory-mapped register that may be read at any time. A bit
is cleared by writing a one (writing a zero does not affect a bit's value). More than one bit
may be cleared at a time. All unmasked bits must be cleared before the CP will clear the
internal interrupt request. This register is cleared at reset.
An example of the timing of various events in the UART event register is shown in Figure 4-
23.
MOTOROLA
The data length is the number of octets that the CP should transmit from this BD's data
buffer. It is never modified by the CP. This value should be normally greater than zero.
The data length may be equal to zero with the P bit set, and only a preamble will be sent.
The transmit buffer pointer, which always points to the first location of the associated data
buffer, may be even or odd. The buffer may reside in either internal or external memory.
0 = The CTS signal remained active during transmission.
1 = The CTS signal was negated during transmission.
For correct operation of the function codes, the upper 8 bits of
the pointer must be initialized to zero.
MC68302 USER’S MANUAL
NOTE
Communications Processor (CP)
4-63