LPC1759FBD80,551 NXP Semiconductors, LPC1759FBD80,551 Datasheet - Page 741

• Manufacturer Part Number: LPC1759FBD80,551
• Description: IC ARM CORTEX MCU 512K 80-LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC17xxr

Specifications of LPC1759FBD80,551

• Program Memory Type: FLASH
• Program Memory Size: 512KB (512K x 8)
• Package / Case: 80-LQFP
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 120MHz
• Connectivity: CAN, I²C, IrDA, Microwire, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 52
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 3.6 V
• Data Converters: A/D 6x12b, D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC17
• Core: ARM Cortex M3
• Data Bus Width: 32 bit
• Data Ram Size: 64 KB
• Interface Type: Ethernet, USB, OTG, CAN
• Maximum Clock Frequency: 120 MHz
• Number Of Programmable I/os: 52
• Number Of Timers: 4
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 6 Channel
• On-chip Dac: 10 bit
• Package: 80LQFP
• Device Core: ARM Cortex M3
• Family Name: LPC17xx
• Maximum Speed: 120 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4968; 935290523551

NXP Semiconductors
UM10360
User manual
The memory map has two 32MB alias regions that map to two 1MB bit-band regions:
Table 636.
Table 637.
Remark: A word access to the SRAM or peripheral bit-band alias regions map to a single
bit in the SRAM or peripheral bit-band region.
The following formula shows how the alias region maps onto the bit-band region:
bit_word_offset = (byte_offset x 32) + (bit_number x 4)
bit_word_addr = bit_band_base + bit_word_offset
where:
Figure 146
and the SRAM bit-band region:
Address
range
0x20000000 -
0x200FFFFF
0x22000000 -
0x23FFFFFF0
Address
range
0x40000000 -
0x400FFFFF
0x42000000 -
0x44FFFFFF
•
•
•
•
•
•
•
•
accesses to the 32MB SRAM alias region map to the 1MB SRAM bit-band region, as
shown in
accesses to the 32MB peripheral alias region map to the 1MB peripheral bit-band
region, as shown in
Bit_word_offset is the position of the target bit in the bit-band memory region.
Bit_word_addr is the address of the word in the alias memory region that maps to the
targeted bit.
Bit_band_base is the starting address of the alias region.
Byte_offset is the number of the byte in the bit-band region that contains the targeted
bit.
Bit_number is the bit position, 0-7, of the targeted bit.
The alias word at 0x23FFFFE0 maps to bit[0] of the bit-band byte at 0x200FFFFF:
0x23FFFFE0 = 0x22000000 + (0xFFFFF*32) + (0*4).
SRAM memory bit-banding regions
Peripheral memory bit-banding regions
shows examples of bit-band mapping between the SRAM bit-band alias region
Table 636
All information provided in this document is subject to legal disclaimers.
Memory
region
SRAM bit-band
region
SRAM bit-band
alias
Memory
region
Peripheral
bit-band alias
Peripheral
bit-band region
Rev. 2 — 19 August 2010
Table
637.
Instruction and data accesses
Direct accesses to this memory range behave as SRAM
memory accesses, but this region is also bit addressable
through bit-band alias.
Data accesses to this region are remapped to bit band
region. A write operation is performed as
read-modify-write. Instruction accesses are not
remapped.
Instruction and data accesses
Direct accesses to this memory range behave as
peripheral memory accesses, but this region is also bit
addressable through bit-band alias.
Data accesses to this region are remapped to bit band
region. A write operation is performed as
read-modify-write. Instruction accesses are not permitted.
Chapter 34: Appendix: Cortex-M3 user guide
UM10360
© NXP B.V. 2010. All rights reserved.
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