LPC1759FBD80,551 NXP Semiconductors, LPC1759FBD80,551 Datasheet - Page 104

IC ARM CORTEX MCU 512K 80-LQFP

LPC1759FBD80,551

Manufacturer Part Number
LPC1759FBD80,551
Description
IC ARM CORTEX MCU 512K 80-LQFP
Manufacturer
NXP Semiconductors
Series
LPC17xxr

Specifications of LPC1759FBD80,551

Program Memory Type
FLASH
Program Memory Size
512KB (512K x 8)
Package / Case
80-LQFP
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
120MHz
Connectivity
CAN, I²C, IrDA, Microwire, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
Number Of I /o
52
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.4 V ~ 3.6 V
Data Converters
A/D 6x12b, D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
LPC17
Core
ARM Cortex M3
Data Bus Width
32 bit
Data Ram Size
64 KB
Interface Type
Ethernet, USB, OTG, CAN
Maximum Clock Frequency
120 MHz
Number Of Programmable I/os
52
Number Of Timers
4
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 6 Channel
On-chip Dac
10 bit
Package
80LQFP
Device Core
ARM Cortex M3
Family Name
LPC17xx
Maximum Speed
120 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4968
935290523551

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8.1 How to read this chapter
8.2 Description
8.3 Pin function select register values
UM10360
User manual
Table 74.
The pin connect block allows most pins of the microcontroller to have more than one
potential function. Configuration registers control the multiplexers to allow connection
between the pin and the on chip peripherals.
Peripherals should be connected to the appropriate pins prior to being activated and prior
to any related interrupt(s) being enabled. Activity of any enabled peripheral function that is
not mapped to a related pin should be considered undefined.
Selection of a single function on a port pin excludes other peripheral functions available
on the same pin. However, the GPIO input stays connected and may be read by software
or used to contribute to the GPIO interrupt feature.
The PINSEL registers control the functions of device pins as shown below. Pairs of bits in
these registers correspond to specific device pins.
Table 75.
Register
PINSEL0
PINSEL1
PINSEL2
PINSEL3
PINSEL4
PINSEL5
PINSEL6
PINSEL7
PINSEL8
PINSEL9
PINSEL10
PINSEL0 to
PINSEL9 Values
00
01
10
11
Table 74
UM10360
Chapter 8: LPC17xx Pin connect block
Rev. 2 — 19 August 2010
shows the functions of the PINSEL registers in the LPC17xx.
Summary of PINSEL registers
Pin function select register bits
Controls
P0[15:0]
P0 [31:16]
P1 [15:0] (Ethernet)
P1 [31:16]
P2 [15:0]
P2 [31:16]
P3 [15:0]
P3 [31:16]
P4 [15:0]
P4 [31:16]
Trace port enable
All information provided in this document is subject to legal disclaimers.
Function
Primary (default) function, typically GPIO port
First alternate function
Second alternate function
Third alternate function
Rev. 2 — 19 August 2010
Table
Table 79
Table 80
Table 81
Table 82
Table 83
not used
not used
Table 84
not used
Table 85
Table 86
© NXP B.V. 2010. All rights reserved.
Value after Reset
00
User manual
104 of 840

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