LPC1759FBD80,551 NXP Semiconductors, LPC1759FBD80,551 Datasheet - Page 519

• Manufacturer Part Number: LPC1759FBD80,551
• Description: IC ARM CORTEX MCU 512K 80-LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC17xxr

Specifications of LPC1759FBD80,551

• Program Memory Type: FLASH
• Program Memory Size: 512KB (512K x 8)
• Package / Case: 80-LQFP
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 120MHz
• Connectivity: CAN, I²C, IrDA, Microwire, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 52
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 3.6 V
• Data Converters: A/D 6x12b, D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC17
• Core: ARM Cortex M3
• Data Bus Width: 32 bit
• Data Ram Size: 64 KB
• Interface Type: Ethernet, USB, OTG, CAN
• Maximum Clock Frequency: 120 MHz
• Number Of Programmable I/os: 52
• Number Of Timers: 4
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 6 Channel
• On-chip Dac: 10 bit
• Package: 80LQFP
• Device Core: ARM Cortex M3
• Family Name: LPC17xx
• Maximum Speed: 120 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4968; 935290523551

NXP Semiconductors
Table 450: PWM Capture Control Register (PWM1CCR - address 0x4001 8028) bit description
Table 451: PWM Control Register (PWM1PCR - address 0x4001 804C) bit description
UM10360
User manual
6
8:7
9
10
11
12
13
Bit
3
4
5
31:6 -
Bit
1:0
2
3
4
5
Symbol
Capture on
CAPn.1rising
edge
Capture on
CAPn.1falling
edge
Interrupt on
CAPn.1 event
Symbol
Unused
PWMSEL2
PWMSEL3
PWMSEL4
PWMSEL5
PWMSEL6
-
PWMENA1
PWMENA2
PWMENA3
PWMENA4
PWMENA5
24.6.6 PWM Control Register (PWM1PCR - 0x4001 804C)
Value Description
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
Value Description
0
1
0
1
0
1
The PWM Control Register is used to enable and select the type of each PWM channel.
The function of each of the bits are shown in
Unused, always zero.
Selects double edge controlled mode for the PWM2 output.
Selects single edge controlled mode for PWM2.
Selects double edge controlled mode for the PWM3 output.
Selects single edge controlled mode for PWM3.
Selects double edge controlled mode for the PWM4 output.
Selects single edge controlled mode for PWM4.
Selects double edge controlled mode for the PWM5 output.
Selects single edge controlled mode for PWM5.
Selects double edge controlled mode for the PWM6 output.
Selects single edge controlled mode for PWM6.
Reserved, user software should not write ones to reserved bits. The value read from a
reserved bit is not defined.
The PWM1 output enabled.
The PWM1 output disabled.
The PWM2 output enabled.
The PWM2 output disabled.
The PWM3 output enabled.
The PWM3 output disabled.
The PWM4 output enabled.
The PWM4 output disabled.
The PWM5 output enabled.
The PWM5 output disabled.
This feature is disabled.
A synchronously sampled rising edge on the CAPn.1 input will cause CR1 to be
loaded with the contents of the TC.
This feature is disabled.
A synchronously sampled falling edge on CAPn.1 will cause CR1 to be loaded with
the contents of TC.
This feature is disabled.
A CR1 load due to a CAPn.1 event will generate an interrupt.
Reserved, user software should not write ones to reserved bits. The value read from
a reserved bit is not defined.
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 19 August 2010
Chapter 24: LPC17xx Pulse Width Modulator (PWM)
Table
451.
UM10360
© NXP B.V. 2010. All rights reserved.
519 of 840
Reset
Value
0
0
0
NA
Reset
Value
NA
0
0
0
0
0
NA
0
0
0
0
0