LPC1759FBD80,551 NXP Semiconductors, LPC1759FBD80,551 Datasheet - Page 348

IC ARM CORTEX MCU 512K 80-LQFP

LPC1759FBD80,551

Manufacturer Part Number
LPC1759FBD80,551
Description
IC ARM CORTEX MCU 512K 80-LQFP
Manufacturer
NXP Semiconductors
Series
LPC17xxr

Specifications of LPC1759FBD80,551

Program Memory Type
FLASH
Program Memory Size
512KB (512K x 8)
Package / Case
80-LQFP
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
120MHz
Connectivity
CAN, I²C, IrDA, Microwire, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
Number Of I /o
52
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.4 V ~ 3.6 V
Data Converters
A/D 6x12b, D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
LPC17
Core
ARM Cortex M3
Data Bus Width
32 bit
Data Ram Size
64 KB
Interface Type
Ethernet, USB, OTG, CAN
Maximum Clock Frequency
120 MHz
Number Of Programmable I/os
52
Number Of Timers
4
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 6 Channel
On-chip Dac
10 bit
Package
80LQFP
Device Core
ARM Cortex M3
Family Name
LPC17xx
Maximum Speed
120 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4968
935290523551

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NXP Semiconductors
UM10360
User manual
Fig 56. Global Self-Test (high-speed CAN Bus example)
TX Buffer
RX Buffer
TX Buffer
LPC17xx
TX Buffer
Both self-tests are using the ‘Self Reception’ feature of the CAN Controller. With the Self
Reception Request, the transmitted message is also received and stored in the receive
buffer. Therefore the acceptance filter has to be configured accordingly. As soon as the
CAN message is transmitted, a transmit and a receive interrupt are generated, if enabled.
Global self test
A Global Self-Test can for example be used to verify the chosen configuration of the CAN
Controller in a given CAN system. As shown in
which is acknowledging each CAN message has to be connected to the CAN bus.
Initiating a Global Self-Test is similar to a normal CAN transmission. In this case the
transmission of a CAN message(s) is initiated by setting Self Reception Request bit
(SRR) in conjunction with the selected Message Buffer bits (STB3, STB2, STB1) in the
CAN Controller Command register (CANCMR).
Local self test
The Local Self-Test perfectly fits for single node tests. In this case an acknowledge from
other nodes is not needed. As shown in the Figure below, a CAN transceiver with an
appropriate CAN bus termination has to be connected to the LPC17xx. The CAN
Controller has to be put into the 'Self Test Mode' by setting the STM bit in the CAN
Controller Mode register (CANMOD). Hint: Setting the Self Test Mode bit (STM) is
possible only when the CAN Controller is in Reset Mode.
A message transmission is initiated by setting Self Reception Request bit (SRR) in
conjunction with the selected Message Buffer(s) (STB3, STB2, STB1).
Fig 57. Local self test (high-speed CAN Bus example)
Transceiver
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 19 August 2010
CAN Bus
TX Buffer
TX Buffer
LPC17xx
RX Buffer
TX Buffer
Transceiver
Figure
56, at least one other CAN node,
Chapter 16: LPC17xx CAN1/2
UM10360
© NXP B.V. 2010. All rights reserved.
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