S912XET256J2VAGR Freescale Semiconductor, S912XET256J2VAGR Datasheet - Page 967

• Manufacturer Part Number: S912XET256J2VAGR
• Description: 16-bit Microcontrollers - MCU Watchdog OSC/Timer -40 C to + 105 C HCS12X MCU SPI
• Manufacturer: Freescale Semiconductor

Specifications of S912XET256J2VAGR

• Core: HCS12X
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 256 KB
• Data Ram Size: 16 KB
• On-chip Adc: Yes
• Package / Case: LQFP
• Mounting Style: SMD/SMT
• A/d Bit Size: 12 bit
• A/d Channels Available: 24
• Interface Type: CAN, SCI, SPI
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 119
• Number Of Timers: 25
• Program Memory Type: Flash
• Supply Voltage - Max: 1.98 V, 2.9 V, 5.5 V
• Supply Voltage - Min: 1.72 V, 2.7 V, 3.13 V

26.3.2.2
The FSEC register holds all bits associated with the security of the MCU and Flash module.
All bits in the FSEC register are readable but not writable.
During the reset sequence, the FSEC register is loaded with the contents of the Flash security byte in the
Flash configuration field at global address 0x7F_FF0F located in P-Flash memory (see
indicated by reset condition F in
phrase containing the Flash security byte during the reset sequence, all bits in the FSEC register will be
set to leave the Flash module in a secured state with backdoor key access disabled.
Freescale Semiconductor
KEYEN[1:0]
RNV[5:2}
SEC[1:0]
Offset Module Base + 0x0001
Reset
2. FDIV shown generates an FCLK frequency of 1.05 MHz
Field
7–6
5–2
1–0
W
R
Backdoor Key Security Enable Bits — The KEYEN[1:0] bits define the enabling of backdoor key access to the
Flash module as shown in
Reserved Nonvolatile Bits — The RNV bits should remain in the erased state for future enhancements.
Flash Security Bits — The SEC[1:0] bits define the security state of the MCU as shown in
Flash module is unsecured using backdoor key access, the SEC bits are forced to 10.
Flash Security Register (FSEC)
F
7
KEYEN[1:0]
= Unimplemented or Reserved
F
6
1. Preferred KEYEN state to disable backdoor key access.
KEYEN[1:0]
Figure 26-6. Flash Security Register (FSEC)
MC9S12XE-Family Reference Manual Rev. 1.25
00
01
10
11
Figure
Table 26-10. FSEC Field Descriptions
Table
Table 26-11. Flash KEYEN States
F
5
26-11.
26-6. If a double bit fault is detected while reading the P-Flash
Status of Backdoor Key Access
F
4
RNV[5:2]
Description
DISABLED
DISABLED
DISABLED
ENABLED
Chapter 26 384 KByte Flash Module (S12XFTM384K2V1)
F
3
(1)
F
2
F
1
Table
Table
SEC[1:0]
26-12. If the
26-3) as
F
0
967