S912XET256J2VAGR Freescale Semiconductor, S912XET256J2VAGR Datasheet - Page 371

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S912XET256J2VAGR

Manufacturer Part Number
S912XET256J2VAGR
Description
16-bit Microcontrollers - MCU Watchdog OSC/Timer -40 C to + 105 C HCS12X MCU SPI
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of S912XET256J2VAGR

Core
HCS12X
Data Bus Width
16 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
256 KB
Data Ram Size
16 KB
On-chip Adc
Yes
Package / Case
LQFP
Mounting Style
SMD/SMT
A/d Bit Size
12 bit
A/d Channels Available
24
Interface Type
CAN, SCI, SPI
Maximum Operating Temperature
+ 105 C
Minimum Operating Temperature
- 40 C
Number Of Programmable I/os
119
Number Of Timers
25
Program Memory Type
Flash
Supply Voltage - Max
1.98 V, 2.9 V, 5.5 V
Supply Voltage - Min
1.72 V, 2.7 V, 3.13 V
10.3.1.14 XGATE Register 2 (XGR2)
The XGR2 register
Module Base +0x00024
Read: In debug mode if unsecured and not idle (XGCHID ≠ 0x00)
Write: In debug mode if unsecured and not idle (XGCHID ≠ 0x00)
10.3.1.15 XGATE Register 3 (XGR3)
The XGR3 register
Module Base +0x00026
Read: In debug mode if unsecured and not idle (XGCHID ≠ 0x00)
Write: In debug mode if unsecured and not idle (XGCHID ≠ 0x00)
Freescale Semiconductor
Reset
Reset
XGR2[15:0]
XGR3[15:0]
W
W
R
R
Field
15–0
Field
15–0
15
15
0
0
XGATE Register 2 — The RISC core’s register 2
XGATE Register 3 — The RISC core’s register 3
14
14
0
0
(Figure
(Figure
13
13
0
0
12
12
0
0
10-16) provides access to the RISC core’s register 2.
10-17) provides access to the RISC core’s register 3.
MC9S12XE-Family Reference Manual Rev. 1.25
11
11
Figure 10-16. XGATE Register 2 (XGR2)
Figure 10-17. XGATE Register 3 (XGR3)
0
0
Table 10-16. XGR2 Field Descriptions
Table 10-17. XGR3 Field Descriptions
10
10
0
0
0
0
9
9
0
0
8
8
XGR2
XGR3
Description
Description
0
0
7
7
6
0
6
0
0
0
5
5
0
0
4
4
Chapter 10 XGATE (S12XGATEV3)
0
0
3
3
0
0
2
2
1
0
1
0
0
0
0
0
371

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