S912XET256J2VAGR Freescale Semiconductor, S912XET256J2VAGR Datasheet - Page 682

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S912XET256J2VAGR

Manufacturer Part Number
S912XET256J2VAGR
Description
16-bit Microcontrollers - MCU Watchdog OSC/Timer -40 C to + 105 C HCS12X MCU SPI
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of S912XET256J2VAGR

Core
HCS12X
Data Bus Width
16 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
256 KB
Data Ram Size
16 KB
On-chip Adc
Yes
Package / Case
LQFP
Mounting Style
SMD/SMT
A/d Bit Size
12 bit
A/d Channels Available
24
Interface Type
CAN, SCI, SPI
Maximum Operating Temperature
+ 105 C
Minimum Operating Temperature
- 40 C
Number Of Programmable I/os
119
Number Of Timers
25
Program Memory Type
Flash
Supply Voltage - Max
1.98 V, 2.9 V, 5.5 V
Supply Voltage - Min
1.72 V, 2.7 V, 3.13 V
Chapter 18 Periodic Interrupt Timer (S12PIT24B4CV2)
18.3.0.3
Read: Anytime
Write: Anytime
682
Module Base + 0x0002
PCE[3:0]
Reset
Field
3:0
W
R
PIT Enable Bits for Timer Channel 3:0 — These bits enable the PIT channels 3-0. If PCE is cleared, the PIT
channel is disabled and the corresponding flag bit in the PITTF register is cleared. When PCE is set, and if the
PIT module is enabled (PITE = 1) the 16-bit timer counter is loaded with the start count value and starts down-
counting.
0 The corresponding PIT channel is disabled.
1 The corresponding PIT channel is enabled.
PIT Channel Enable Register (PITCE)
0
0
7
0
0
6
Figure 18-5. PIT Channel Enable Register (PITCE)
MC9S12XE-Family Reference Manual Rev. 1.25
Table 18-4. PITCE Field Descriptions
0
0
5
0
0
4
Description
PCE3
0
3
PCE2
0
2
Freescale Semiconductor
PCE1
0
1
PCE0
0
0

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