S912XET256J2VAGR Freescale Semiconductor, S912XET256J2VAGR Datasheet - Page 1283

• Manufacturer Part Number: S912XET256J2VAGR
• Description: 16-bit Microcontrollers - MCU Watchdog OSC/Timer -40 C to + 105 C HCS12X MCU SPI
• Manufacturer: Freescale Semiconductor

Specifications of S912XET256J2VAGR

• Core: HCS12X
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 256 KB
• Data Ram Size: 16 KB
• On-chip Adc: Yes
• Package / Case: LQFP
• Mounting Style: SMD/SMT
• A/d Bit Size: 12 bit
• A/d Channels Available: 24
• Interface Type: CAN, SCI, SPI
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 119
• Number Of Timers: 25
• Program Memory Type: Flash
• Supply Voltage - Max: 1.98 V, 2.9 V, 5.5 V
• Supply Voltage - Min: 1.72 V, 2.7 V, 3.13 V

0x00C8–0x00CF Asynchronous Serial Interface (SCI0) Map
1. Those registers are accessible if the AMAP bit in the SCI0SR2 register is set to zero
2. Those registers are accessible if the AMAP bit in the SCI0SR2 register is set to one
0x00D0–0x00D7 Asynchronous Serial Interface (SCI1) Map
Freescale Semiconductor
Address
Address
0x00CA
0x00CA
0x00CB
0x00CC
0x00CD
0x00CE
0x00C8
0x00C9
0x00C8
0x00C9
0x00CF
0x00D0
0x00D1
0x00D2
0x00D0
0x00D1
0x00D2
0x00D3
0x00D4
SCI0ASR1
SCI1ASR1
SCI0BDH
SCI0ACR1
SCI0ACR2
SCI1BDH
SCI1ACR1
SCI1ACR2
SCI0CR1
SCI1CR1
SCI0BDL
SCI1BDL
SCI0DRH
SCI0CR2
SCI0SR1
SCI0SR2
SCI0DRL
SCI1CR2
SCI1SR1
Name
Name
(1)
(1)
1
1
1
1
(2)
(2)
2
2
2
2
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
RXEDGIF
RXEDGIE
RXEDGIF
RXEDGIE
LOOPS
LOOPS
AMAP
TDRE
TDRE
SBR7
SBR7
IREN
IREN
Bit 7
Bit 7
TIE
TIE
R8
R7
T7
0
0
MC9S12XE-Family Reference Manual Rev. 1.25
SCISWAI
SCISWAI
TNP1
SBR6
TNP1
SBR6
TCIE
TCIE
Bit 6
Bit 6
TC
R6
TC
T8
T6
0
0
0
0
0
0
0
RSRC
RSRC
RDRF
RDRF
TNP0
SBR5
TNP0
SBR5
Bit 5
Bit 5
RIE
RIE
R5
T5
0
0
0
0
0
0
0
0
SBR12
TXPOL
SBR12
SBR4
SBR4
Bit 4
IDLE
Bit 4
IDLE
ILIE
ILIE
R4
T4
M
M
0
0
0
0
0
0
0
RXPOL
SBR11
SBR11
WAKE
WAKE
SBR3
SBR3
Bit 3
Bit 3
OR
OR
TE
R3
TE
T3
0
0
0
0
0
0
0
Appendix E Detailed Register Address Map
BERRM1
BERRM1
BERRV
BERRV
SBR10
BRK13
SBR10
SBR2
SBR2
Bit 2
Bit 2
ILT
RE
NF
ILT
RE
NF
R2
T2
0
0
0
BERRM0
BERRM0
BERRIF
BERRIE
BERRIF
BERRIE
TXDIR
SBR9
SBR1
SBR9
SBR1
RWU
RWU
Bit 1
Bit 1
PE
FE
R1
PE
FE
T1
0
BKDFE
BKDFE
BKDIE
BKDIE
BKDIF
BKDIF
SBR8
SBR0
SBR8
SBR0
Bit 0
Bit 0
SBK
RAF
SBK
PT
PF
R0
PT
PF
T0
0
1283