S912XET256J2VAGR Freescale Semiconductor, S912XET256J2VAGR Datasheet - Page 451
S912XET256J2VAGR
Manufacturer Part Number
S912XET256J2VAGR
Description
16-bit Microcontrollers - MCU Watchdog OSC/Timer -40 C to + 105 C HCS12X MCU SPI
Manufacturer
Freescale Semiconductor
Datasheet
1.S912XEQ512J3CAGR.pdf
(1324 pages)
Specifications of S912XET256J2VAGR
Core
HCS12X
Data Bus Width
16 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
256 KB
Data Ram Size
16 KB
On-chip Adc
Yes
Package / Case
LQFP
Mounting Style
SMD/SMT
A/d Bit Size
12 bit
A/d Channels Available
24
Interface Type
CAN, SCI, SPI
Maximum Operating Temperature
+ 105 C
Minimum Operating Temperature
- 40 C
Number Of Programmable I/os
119
Number Of Timers
25
Program Memory Type
Flash
Supply Voltage - Max
1.98 V, 2.9 V, 5.5 V
Supply Voltage - Min
1.72 V, 2.7 V, 3.13 V
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STB
Operation
RS.L ⇒ M[RB, #OFFS5]
RS.L ⇒ M[RB, RI]
RS.L ⇒ M[RB, RI];
RI–1 ⇒ RI;
Stores the low byte of register RS to memory.
CCR Effects
Code and CPU Cycles
1. If the same general purpose register is used as index (RI) and source register (RS), the unmodified content of the source
Freescale Semiconductor
N:
Z:
V:
C:
STB RS, (RB, #OFFS5),
STB RS, (RB, RI)
STB RS, (RB, RI+)
STB RS, (RB, -RI)
—
N
register is written to the memory: RS.L ⇒ M[RB, RS-1]; RS-1 ⇒ RS
Not affected.
Not affected.
Not affected.
Not affected.
—
Z
—
V
Source Form
—
C
RI+1 ⇒ RI;
RS.L ⇒ M[RB, RI]
MC9S12XE-Family Reference Manual Rev. 1.25
Address
Mode
IDO5
IDR+
-IDR
IDR
Store Byte to Memory
1
0
0
0
0
(Low Byte)
1
1
1
1
0
1
1
1
1
1
1
1
0
0
0
0
Machine Code
RS
RS
RS
RS
RB
RB
RB
RB
Chapter 10 XGATE (S12XGATEV3)
RI
RI
RI
OFFS5
STB
0
0
1
0
1
0
Cycles
Pw
Pw
Pw
Pw
451
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