S912XET256J2VAGR Freescale Semiconductor, S912XET256J2VAGR Datasheet - Page 1206

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S912XET256J2VAGR

Manufacturer Part Number
S912XET256J2VAGR
Description
16-bit Microcontrollers - MCU Watchdog OSC/Timer -40 C to + 105 C HCS12X MCU SPI
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of S912XET256J2VAGR

Core
HCS12X
Data Bus Width
16 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
256 KB
Data Ram Size
16 KB
On-chip Adc
Yes
Package / Case
LQFP
Mounting Style
SMD/SMT
A/d Bit Size
12 bit
A/d Channels Available
24
Interface Type
CAN, SCI, SPI
Maximum Operating Temperature
+ 105 C
Minimum Operating Temperature
- 40 C
Number Of Programmable I/os
119
Number Of Timers
25
Program Memory Type
Flash
Supply Voltage - Max
1.98 V, 2.9 V, 5.5 V
Supply Voltage - Min
1.72 V, 2.7 V, 3.13 V
Appendix A Electrical Characteristics
A.1.7
This section describes the operating conditions of the device. Unless otherwise noted those conditions
apply to all the following data.
1. The device contains an internal voltage regulator to generate the logic and PLL supply out of the I/O supply. .
2. This refers to the oscillator base frequency. Typical crystal & resonator tolerances are supported.
3. Please refer to
4. Please refer to
1206
I/O, regulator and analog supply voltage
NVM logic supply voltage
Voltage difference V
Voltage difference V
Voltage difference V
Voltage difference V
Digital logic supply voltage
PLL supply voltage
Oscillator
(Full Swing Pierce)
Bus frequency
C Operating junction temperature range
V Operating junction temperature range
M Operating junction temperature range
ambient temperature T
Operating ambient temperature range
Operating ambient temperature range
Operating ambient temperature range
(2)
(Loop Controlled Pierce)
Operating Conditions
(3)
Table A-25
Section A.1.8, “Power Dissipation and Thermal Characteristics”
Please refer to the temperature rating of the device (C, V, M) with regards to
the ambient temperature T
dissipation calculations refer to
Thermal
Using the internal voltage regulator, operation is guaranteed in a power
down until a low voltage reset assertion.
DDX
DDR
SSX
SS1
, V
to V
A
to V
to V
(1)
and device junction temperature T
1
SS2
Rating
Characteristics”.
SSA
for maximum bus frequency limits with frequency modulation enabled
DDA
DDX
, V
SS3
MC9S12XE-Family Reference Manual Rev. 1.25
, V
SSPLL
(4)
2
2
Table A-4. Operating Conditions
to V
A
SSX
and the junction temperature T
Section A.1.8, “Power Dissipation and
NOTE
NOTE
J
.
Symbol
V
V
V
DDPLL
VDDR
V
VDDX
VSSX
f
f
DD35
VSS
T J
T A
T J
T A
T J
T A
DDF
osc
bus
DD
3.13
–0.1
–0.1
1.72
1.72
for more details about the relation between
Min
–40
–40
–40
–40
–40
–40
2.7
0.5
4
2
J
. For power
refer to
refer to
Typ
2.8
1.8
1.8
27
27
27
5
0
0
Table A-15
Table A-15
Freescale Semiconductor
Max
1.98
1.98
110
130
105
150
125
5.5
2.9
0.1
0.1
16
40
50
85
MHz
MHz
Unit
°C
°C
°C
V
V
V
V
V
V

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