S912XET256J2VAGR Freescale Semiconductor, S912XET256J2VAGR Datasheet - Page 59

• Manufacturer Part Number: S912XET256J2VAGR
• Description: 16-bit Microcontrollers - MCU Watchdog OSC/Timer -40 C to + 105 C HCS12X MCU SPI
• Manufacturer: Freescale Semiconductor

Specifications of S912XET256J2VAGR

• Core: HCS12X
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 256 KB
• Data Ram Size: 16 KB
• On-chip Adc: Yes
• Package / Case: LQFP
• Mounting Style: SMD/SMT
• A/d Bit Size: 12 bit
• A/d Channels Available: 24
• Interface Type: CAN, SCI, SPI
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 119
• Number Of Timers: 25
• Program Memory Type: Flash
• Supply Voltage - Max: 1.98 V, 2.9 V, 5.5 V
• Supply Voltage - Min: 1.72 V, 2.7 V, 3.13 V

Freescale Semiconductor
Function 1
Name
PF2
PF1
PF0
PH7
PH6
PH5
PH4
PH3
PH2
PH1
PH0
PK7
PJ7
PJ6
PJ5
PJ4
PJ3
PJ2
PJ1
PJ0
Pin
Function 2
EWAIT
KWH7
KWH6
KWH5
KWH4
KWH3
KWH2
KWH1
KWH0
Name
KWJ7
KWJ6
KWJ5
KWJ4
KWJ3
KWJ2
KWJ1
KWJ0
CS2
CS1
CS0
Pin
Function 3
ROMCTL
TXCAN4
RXCAN4
MOSI2
MISO2
MOSI1
MISO1
Name
RXD2
SCK2
SCK1
SCL1
SDA1
TXD2
SS2
SS1
CS1
Pin
—
—
—
—
Table 1-10. Signal Properties Summary (Sheet 2 of 4)
MC9S12XE-Family Reference Manual Rev. 1.25
Function 4
Name
RXD5
RXD4
RXD7
RXD6
TXD5
TXD4
TXD7
TXD6
SDA0
SCL0
CS2
CS0
CS3
Pin
—
—
—
—
—
—
—
Function 5
RXCAN0
TXCAN0
Name
Pin
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Supply
Power
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
DDX
DDX
DDX
DDX
DDX
DDX
DDX
DDX
DDX
DDX
DDX
DDX
DDX
DDX
DDX
DDX
DDX
DDX
DDX
DDX
PERH/PPSH Disabled Port H I/O, interrupt, MISO
PERH/PPSH Disabled Port H I/O, interrupt, SS of
PERH/PPSH Disabled Port H I/O, interrupt, SCK of
PERH/PPSH Disabled Port H I/O, interrupt, MOSI
PERH/PPSH Disabled Port H I/O, interrupt, MISO
PERH/
PERH/
PERH/
PERF/
PERF/
PERF/
PERJ/
PERJ/
PERJ/
PERJ/
PERJ/
PERJ/
PERJ/
PERJ/
PUCR
CTRL
PPSF
PPSF
PPSF
PPSH
PPSH
PPSH
PPSJ
PPSJ
PPSJ
PPSJ
PPSJ
PPSJ
PPSJ
PPSJ
Internal Pull
Resistor
Chapter 1 Device Overview MC9S12XE-Family
Disabled Port H I/O, interrupt, SS of
Disabled Port H I/O, interrupt, SCK of
Disabled Port H I/O, interrupt, MOSI
Reset
State
Up
Up
Up
Up
Up
Up
Up
Up
Up
Up
Up
Up
Port F I/O, interrupt, chip
select 2
Port F I/O, interrupt, chip
select 1
Port F I/O, interrupt, chip
select 0
SPI2, TXD of SCI5
SPI2, RXD of SCI5
of SPI2, TXD of SCI4
of SPI2, RXD of SCI4
SPI1
SPI1
of SPI1
of SPI1
Port J I/O, interrupt, TX of
CAN4, SCL of IIC0, TX of
CAN0
Port J I/O, interrupt, RX of
CAN4, SDA of IIC0, RX of
CAN0
Port J I/O, interrupt, SCL of
IIC1, chip select 2
Port J I/O, interrupt, SDA of
IIC1, chip select 0
Port J I/O, interrupt,
Port J I/O, interrupt, chip
select 1
Port J I/O, interrupt, TXD of
SCI2
Port J I/O, interrupt, RXD of
SCI2
Port K I/O, EWAIT
ROM on control
Description
input,
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