S912XET256J2VAGR Freescale Semiconductor, S912XET256J2VAGR Datasheet - Page 645

• Manufacturer Part Number: S912XET256J2VAGR
• Description: 16-bit Microcontrollers - MCU Watchdog OSC/Timer -40 C to + 105 C HCS12X MCU SPI
• Manufacturer: Freescale Semiconductor

Specifications of S912XET256J2VAGR

• Core: HCS12X
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 256 KB
• Data Ram Size: 16 KB
• On-chip Adc: Yes
• Package / Case: LQFP
• Mounting Style: SMD/SMT
• A/d Bit Size: 12 bit
• A/d Channels Available: 24
• Interface Type: CAN, SCI, SPI
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 119
• Number Of Timers: 25
• Program Memory Type: Flash
• Supply Voltage - Max: 1.98 V, 2.9 V, 5.5 V
• Supply Voltage - Min: 1.72 V, 2.7 V, 3.13 V

Freescale Semiconductor
Extended Identifier
Standard Identifier
CAN 2.0A/B
•
•
•
CAN 2.0B
Four identifier acceptance filters, each to be applied to:
— The 14 most significant bits of the extended identifier plus the SRR and IDE bits of CAN 2.0B
— The 11 bits of the standard identifier, the RTR and IDE bits of CAN 2.0A/B messages.
Eight identifier acceptance filters, each to be applied to the first 8 bits of the identifier. This mode
implements eight independent filters for the first 8 bits of a CAN 2.0A/B compliant standard
identifier or a CAN 2.0B compliant extended identifier.
Figure 16-42
CANIDMR0–CANIDMR3) produces filter 0 to 3 hits. Similarly, the second filter bank
(CANIDAR4–CANIDAR7, CANIDMR4–CANIDMR7) produces filter 4 to 7 hits.
Closed filter. No CAN message is copied into the foreground buffer RxFG, and the RXF flag is
never set.
Figure 16-40
CANIDMR0–CANIDMR3) produces a filter 0 hit. Similarly, the second filter bank
(CANIDAR4–CANIDAR7, CANIDMR4–CANIDMR7) produces a filter 1 hit.
messages.
Figure 16-41
CANIDMR0–CANIDMR3) produces filter 0 and 1 hits. Similarly, the second filter bank
(CANIDAR4–CANIDAR7, CANIDMR4–CANIDMR7) produces filter 2 and 3 hits.
AM7
AC7
ID28
ID10
shows how the first 32-bit filter bank (CANIDAR0–CANIDAR3,
CANIDMR0
CANIDAR0
IDR0
IDR0
Figure 16-40. 32-bit Maskable Identifier Acceptance Filter
shows how the first 32-bit filter bank (CANIDAR0–CANIDAR3,
shows how the first 32-bit filter bank (CANIDAR0–CANIDAR3,
MC9S12XE-Family Reference Manual Rev. 1.25
AM0
ID21
AC0
ID3
AM7
AC7
ID20
ID2
CANIDMR1
CANIDAR1
IDR1
IDR1
Chapter 16 Freescale’s Scalable Controller Area Network (S12MSCANV3)
ID Accepted (Filter 0 Hit)
IDE
AM0
ID15
AC0
AM7
AC7
ID14
ID10
CANIDMR2
CANIDAR2
IDR2
IDR2
AM0
AC0
ID7
ID3
AM7
AC7
ID6
ID10
CANIDMR3
CANIDAR3
IDR3
IDR3
AM0
AC0
RTR
ID3
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