S912XET256J2VAGR Freescale Semiconductor, S912XET256J2VAGR Datasheet - Page 499

• Manufacturer Part Number: S912XET256J2VAGR
• Description: 16-bit Microcontrollers - MCU Watchdog OSC/Timer -40 C to + 105 C HCS12X MCU SPI
• Manufacturer: Freescale Semiconductor

Specifications of S912XET256J2VAGR

• Core: HCS12X
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 256 KB
• Data Ram Size: 16 KB
• On-chip Adc: Yes
• Package / Case: LQFP
• Mounting Style: SMD/SMT
• A/d Bit Size: 12 bit
• A/d Channels Available: 24
• Interface Type: CAN, SCI, SPI
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 119
• Number Of Timers: 25
• Program Memory Type: Flash
• Supply Voltage - Max: 1.98 V, 2.9 V, 5.5 V
• Supply Voltage - Min: 1.72 V, 2.7 V, 3.13 V

Chapter 12
Pierce Oscillator (S12XOSCLCPV2)
12.1
The Pierce oscillator (XOSC) module provides a robust, low-noise and low-power clock source. The
module will be operated from the V
of external components. It is designed for optimal start-up margin with typical crystal oscillators.
12.1.1
The XOSC will contain circuitry to dynamically control current gain in the output amplitude. This ensures
a signal with low harmonic distortion, low power and good noise immunity.
12.1.2
Two modes of operation exist:
The oscillator mode selection is described in the Device Overview section, subsection Oscillator
Configuration.
Freescale Semiconductor
Revision
Number
V01.05
V02.00
•
•
•
•
•
•
•
1. Loop controlled Pierce (LCP) oscillator
2. External square wave mode featuring also full swing Pierce (FSP) without internal bias resistor
High noise immunity due to input hysteresis
Low RF emissions with peak-to-peak swing limited dynamically
Transconductance (gm) sized for optimum start-up margin for typical oscillators
Dynamic gain control eliminates the need for external current limiting resistor
Integrated resistor eliminates the need for external bias resistor in loop controlled Pierce mode.
Low power consumption:
— Operates from 1.8 V (nominal) supply
— Amplitude control limits power
Clock monitor
Introduction
Features
Modes of Operation
04 Aug 2006
19 Jul 2006
Revision
Date
Sections
Affected
MC9S12XE-Family Reference Manual Rev. 1.25
DDPLL
Table 12-1. Revision History
- All xclks info was removed
- Incremented revision to match the design system spec revision
supply rail (1.8 V nominal) and require the minimum number
Description of Changes
499