S912XET256J2VAGR Freescale Semiconductor, S912XET256J2VAGR Datasheet - Page 38

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S912XET256J2VAGR

Manufacturer Part Number
S912XET256J2VAGR
Description
16-bit Microcontrollers - MCU Watchdog OSC/Timer -40 C to + 105 C HCS12X MCU SPI
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of S912XET256J2VAGR

Core
HCS12X
Data Bus Width
16 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
256 KB
Data Ram Size
16 KB
On-chip Adc
Yes
Package / Case
LQFP
Mounting Style
SMD/SMT
A/d Bit Size
12 bit
A/d Channels Available
24
Interface Type
CAN, SCI, SPI
Maximum Operating Temperature
+ 105 C
Minimum Operating Temperature
- 40 C
Number Of Programmable I/os
119
Number Of Timers
25
Program Memory Type
Flash
Supply Voltage - Max
1.98 V, 2.9 V, 5.5 V
Supply Voltage - Min
1.72 V, 2.7 V, 3.13 V
Chapter 1 Device Overview MC9S12XE-Family
Block B1 is divided into two 128K blocks. The XGATE is always mapped to block B1S.
On the 9S12XEG128 the flash is divided into two 64K blocks B0 and B1S, the B1S range extending from
0x78_0000 to 0x78_FFFF, the B0 range extending from 0x7F_0000 to 0x7F_FFFF.
The block B0 is a reduced size 128K block on the 256K derivative. On the larger derivatives B0 is a 256K
block. The block B0 is a reduced size 64K block on the 128K derivative.
38
9S12XEA128
1. The 9S12XEA devices are special bondouts for access to extra ADC channels in 80QFP.
9S12XEG128
9S12XEA256
9S12XET256
Available in 80QFP only. WARNING: NOT PIN-COMPATIBLE WITH REST OF FAMILY.
Device
(1)
1
Table 1-5. Derivative Dependent Flash Block Mapping (continued)
0x70_0000
MC9S12XE-Family Reference Manual Rev. 1.25
0x74_0000
0x78_0000
B1S (64K)
B1S
0x7A_0000
0x7C_0000
Freescale Semiconductor
0x7E_0000
B0(128K)
B0 (64K)

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