S912XET256J2VAGR Freescale Semiconductor, S912XET256J2VAGR Datasheet - Page 792

• Manufacturer Part Number: S912XET256J2VAGR
• Description: 16-bit Microcontrollers - MCU Watchdog OSC/Timer -40 C to + 105 C HCS12X MCU SPI
• Manufacturer: Freescale Semiconductor

Specifications of S912XET256J2VAGR

• Core: HCS12X
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 256 KB
• Data Ram Size: 16 KB
• On-chip Adc: Yes
• Package / Case: LQFP
• Mounting Style: SMD/SMT
• A/d Bit Size: 12 bit
• A/d Channels Available: 24
• Interface Type: CAN, SCI, SPI
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 119
• Number Of Timers: 25
• Program Memory Type: Flash
• Supply Voltage - Max: 1.98 V, 2.9 V, 5.5 V
• Supply Voltage - Min: 1.72 V, 2.7 V, 3.13 V

Chapter 22 Timer Module (TIM16B8CV2) Block Description
22.2.7
This pin serves as input capture or output compare for channel 1.
22.2.8
This pin serves as input capture or output compare for channel 0.
22.3
This section provides a detailed description of all memory and registers.
22.3.1
The memory map for the TIM16B8CV2 module is given below in
register is the address offset. The total address for each register is the sum of the base address for the
TIM16B8CV2 module and the address offset for each register.
22.3.2
792
This section consists of register descriptions in address order. Each description includes a standard
register diagram with an associated figure number. Details of register bit and field function follow the
register diagrams, in bit order.
Register
CFORC
TCNTH
0x0000
0x0001
0x0002
0x0003
0x0004
0x0005
TCNTL
OC7M
Name
OC7D
TIOS
Memory Map and Register Definition
IOC1 — Input Capture and Output Compare Channel 1 Pin
IOC0 — Input Capture and Output Compare Channel 0 Pin
Module Memory Map
Register Descriptions
For the description of interrupts see
W
W
W
W
W
W
R
R
R
R
R
R
TCNT15
Figure 22-5. TIM16B8CV2 Register Summary (Sheet 1 of 3)
OC7M7
OC7D7
TCNT7
FOC7
IOS7
Bit 7
0
MC9S12XE-Family Reference Manual Rev. 1.25
= Unimplemented or Reserved
TCNT14
OC7M6
OC7D6
TCNT6
FOC6
IOS6
6
0
TCNT13
OC7M5
OC7D5
TCNT5
FOC5
IOS5
5
0
NOTE
Section 22.6,
TCNT12
OC7M4
OC7D4
TCNT4
FOC4
IOS4
4
0
TCNT11
OC7M3
OC7D3
TCNT3
FOC3
IOS3
Figure
“Interrupts”.
3
0
22-5. The address listed for each
TCNT10
OC7M2
OC7D2
TCNT2
FOC2
IOS2
2
0
OC7M1
Freescale Semiconductor
OC7D1
TCNT9
TCNT1
FOC1
IOS1
1
0
OC7M0
OC7D0
TCNT8
TCNT0
FOC0
IOS0
Bit 0
0