S912XET256J2VAGR Freescale Semiconductor, S912XET256J2VAGR Datasheet - Page 187

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S912XET256J2VAGR

Manufacturer Part Number
S912XET256J2VAGR
Description
16-bit Microcontrollers - MCU Watchdog OSC/Timer -40 C to + 105 C HCS12X MCU SPI
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of S912XET256J2VAGR

Core
HCS12X
Data Bus Width
16 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
256 KB
Data Ram Size
16 KB
On-chip Adc
Yes
Package / Case
LQFP
Mounting Style
SMD/SMT
A/d Bit Size
12 bit
A/d Channels Available
24
Interface Type
CAN, SCI, SPI
Maximum Operating Temperature
+ 105 C
Minimum Operating Temperature
- 40 C
Number Of Programmable I/os
119
Number Of Timers
25
Program Memory Type
Flash
Supply Voltage - Max
1.98 V, 2.9 V, 5.5 V
Supply Voltage - Min
1.72 V, 2.7 V, 3.13 V
Chapter 3
Memory Mapping Control (S12XMMCV4)
3.1
This section describes the functionality of the module mapping control (MMC) sub-block of the S12X
platform. The block diagram of the MMC is shown in
The MMC module controls the multi-master priority accesses, the selection of internal resources and
external space. Internal buses, including internal memories and peripherals, are controlled in this module.
The local address space for each master is translated to a global memory space.
Freescale Semiconductor
Revision
Number
V04.04
V04.05
V04.06
Introduction
Revision Date
15 Nov 2006
26 Oct 2005
26 Jul 2006
3.4.2.4/3-212
MC9S12XE-Family Reference Manual Rev. 1.25
Sections
Affected
Table 3-1. Revision History
- Reorganization of MEMCTL0 register bits.
- Updated XGATE Memory Map
- Adding AUTOSAR Compliance concerning illegal CPU accesses
Figure
3-1.
Description of Changes
187

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