S912XET256J2VAGR Freescale Semiconductor, S912XET256J2VAGR Datasheet - Page 124

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S912XET256J2VAGR

Manufacturer Part Number
S912XET256J2VAGR
Description
16-bit Microcontrollers - MCU Watchdog OSC/Timer -40 C to + 105 C HCS12X MCU SPI
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of S912XET256J2VAGR

Core
HCS12X
Data Bus Width
16 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
256 KB
Data Ram Size
16 KB
On-chip Adc
Yes
Package / Case
LQFP
Mounting Style
SMD/SMT
A/d Bit Size
12 bit
A/d Channels Available
24
Interface Type
CAN, SCI, SPI
Maximum Operating Temperature
+ 105 C
Minimum Operating Temperature
- 40 C
Number Of Programmable I/os
119
Number Of Timers
25
Program Memory Type
Flash
Supply Voltage - Max
1.98 V, 2.9 V, 5.5 V
Supply Voltage - Min
1.72 V, 2.7 V, 3.13 V
1. Read: Anytime.
1. Read: Always reads 0x00
1. Read: Always reads 0x00
Chapter 2 Port Integration Module (S12XEPIMV1)
2.3.26
2.3.27
2.3.28
124
Address 0x0245
Address 0x0246
Address 0x0247
Write: Anytime.
Write: Unimplemented
Write: Unimplemented
PPST
Field
Reset
Reset
Reset
7-0
W
W
W
R
R
R
Port T pull device select—Determine pull device polarity on input pins
This register selects whether a pull-down or a pull-up device is connected to the pin.
1 A pull-down device is connected to the associated pin, if enabled and if the pin is used as input.
0 A pull-up device is connected to the associated pin, if enabled and if the pin is used as input.
PPST7
Port T Polarity Select Register (PPST)
PIM Reserved Register
PIM Reserved Register
0
0
0
0
0
7
7
7
= Unimplemented or Reserved
= Unimplemented or Reserved
PPST6
0
0
0
0
0
6
6
6
Figure 2-24. Port T Polarity Select Register (PPST)
Table 2-25. PPST Register Field Descriptions
MC9S12XE-Family Reference Manual Rev. 1.25
Figure 2-25. PIM Reserved Register
Figure 2-26. PIM Reserved Register
PPST5
0
0
0
0
0
5
5
5
PPST4
0
0
0
0
0
4
4
4
Description
PPST3
3
0
3
0
0
3
0
0
PPST2
0
0
0
0
0
2
2
2
Access: User read/write
Freescale Semiconductor
PPST1
0
0
0
0
0
1
1
1
Access: User read
Access: User read
PPST0
0
0
0
0
0
0
0
0
(1)
(1)
(1)

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