S912XET256J2VAGR Freescale Semiconductor, S912XET256J2VAGR Datasheet - Page 160

• Manufacturer Part Number: S912XET256J2VAGR
• Description: 16-bit Microcontrollers - MCU Watchdog OSC/Timer -40 C to + 105 C HCS12X MCU SPI
• Manufacturer: Freescale Semiconductor

Specifications of S912XET256J2VAGR

• Core: HCS12X
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 256 KB
• Data Ram Size: 16 KB
• On-chip Adc: Yes
• Package / Case: LQFP
• Mounting Style: SMD/SMT
• A/d Bit Size: 12 bit
• A/d Channels Available: 24
• Interface Type: CAN, SCI, SPI
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 119
• Number Of Timers: 25
• Program Memory Type: Flash
• Supply Voltage - Max: 1.98 V, 2.9 V, 5.5 V
• Supply Voltage - Min: 1.72 V, 2.7 V, 3.13 V

1. Read: Anytime.
1. Read: Anytime.
Chapter 2 Port Integration Module (S12XEPIMV1)
2.3.78
2.3.79
160
DDR0AD1
Function
Address 0x0279
Address 0x027A
PT1AD1
Write: Anytime.
Write: Anytime.
Altern.
Field
Field
Reset
Reset
7-0
7-0
W
W
R
R
DDR0AD17
PT1AD17
Port AD1 general purpose input/output data—Data Register
This register is associated with ATD1 analog inputs AN[7:0] on PAD[23:16], respectively.
When not used with the alternative function, these pins can be used as general purpose I/O.
If the associated data direction bits of these pins are set to 1, a read returns the value of the port register, otherwise
the buffered pin input state is read.
Port AD1 data direction—
This register controls the data direction of pins 15 through 8.
1 Associated pin is configured as output.
0 Associated pin is configured as input.
Port AD1 Data Register 1 (PT1AD1)
Port AD1 Data Direction Register 0 (DDR0AD1)
AN7
0
0
7
7
DDR0AD16
PT1AD16
Figure 2-77. Port AD1 Data Direction Register 0 (DDR0AD1)
AN6
0
0
6
6
Table 2-75. DDR0AD1 Register Field Descriptions
Figure 2-76. Port AD1 Data Register 1 (PT1AD1)
Table 2-74. PT1AD1 Register Field Descriptions
MC9S12XE-Family Reference Manual Rev. 1.25
DDR0AD15
PT1AD15
AN5
0
0
5
5
DDR0AD14
PT1AD14
AN4
0
0
4
4
Description
Description
DDR0AD13
PT1AD13
AN3
3
0
3
0
DDR0AD12
PT1AD12
AN2
0
0
2
2
DDR0AD11
PT1AD11
Access: User read/write
Access: User read/write
Freescale Semiconductor
AN1
0
0
1
1
DDR0AD10
PT1AD10
AN0
0
0
0
0
(1)
(1)