S912XET256J2VAGR Freescale Semiconductor, S912XET256J2VAGR Datasheet - Page 1236

• Manufacturer Part Number: S912XET256J2VAGR
• Description: 16-bit Microcontrollers - MCU Watchdog OSC/Timer -40 C to + 105 C HCS12X MCU SPI
• Manufacturer: Freescale Semiconductor

Specifications of S912XET256J2VAGR

• Core: HCS12X
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 256 KB
• Data Ram Size: 16 KB
• On-chip Adc: Yes
• Package / Case: LQFP
• Mounting Style: SMD/SMT
• A/d Bit Size: 12 bit
• A/d Channels Available: 24
• Interface Type: CAN, SCI, SPI
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 119
• Number Of Timers: 25
• Program Memory Type: Flash
• Supply Voltage - Max: 1.98 V, 2.9 V, 5.5 V
• Supply Voltage - Min: 1.72 V, 2.7 V, 3.13 V

Appendix A Electrical Characteristics
During power sequencing V
V
V
A.6
This section summarizes the electrical characteristics of the various startup scenarios for oscillator and
phase-locked loop (PLL).
A.6.1
Table A-23
startup behavior can be found in the Clock and Reset Generator (CRG) block description
1. This is the time between RESET deassertion and start of CPU code execution.
2. Including voltage regulator startup; V
A.6.1.1
The release level V
if the device is powered externally. After releasing the POR reset the oscillator and the clock quality check
are started. If after a time t
clock. The fastest startup time possible is given by n
1236
Conditions are shown in
Num C
DDR
RH
1
2
3
4
V
V
V
power up must follow V
DDA
DDR,
DDX
and V
D Reset input pulse width, minimum input time
D Startup from reset
D Wait recovery startup time
D Fast wakeup from STOP
V
Reset, Oscillator and PLL
summarizes several startup characteristics explained in this section. Detailed description of the
Startup
DDX
POR
must be powered up together adhering to the operating conditions differential.
PORR
Table
and the assert level V
CQOUT
A-4unless otherwise noted
Figure A-4. MC9S12XE-Family Power Sequencing
DDA
DDA
(2)
Rating
MC9S12XE-Family Reference Manual Rev. 1.25
DD
can be powered up before V
no valid oscillation is detected, the MCU will start using the internal self
to avoid current injection.
Table A-23. Startup Characteristics
/V
DDF
>= 0
filter capacitors 220 nF, V
PORA
are derived from the V
uposc
.
Symbol
PW
t
t
WRS
t
RST
DDR
fws
DD35
RSTL
, V
= 5 V, T= 25°C
DDX
Min
192
—
—
2
.
DD
supply. They are also valid
Typ
50
—
—
—
Freescale Semiconductor
4000
Max
100
14
—
(1)
t
Unit
n
t
t
µs
osc
cyc
bus