S912XET256J2VAGR Freescale Semiconductor, S912XET256J2VAGR Datasheet - Page 161

• Manufacturer Part Number: S912XET256J2VAGR
• Description: 16-bit Microcontrollers - MCU Watchdog OSC/Timer -40 C to + 105 C HCS12X MCU SPI
• Manufacturer: Freescale Semiconductor

Specifications of S912XET256J2VAGR

• Core: HCS12X
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 256 KB
• Data Ram Size: 16 KB
• On-chip Adc: Yes
• Package / Case: LQFP
• Mounting Style: SMD/SMT
• A/d Bit Size: 12 bit
• A/d Channels Available: 24
• Interface Type: CAN, SCI, SPI
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 119
• Number Of Timers: 25
• Program Memory Type: Flash
• Supply Voltage - Max: 1.98 V, 2.9 V, 5.5 V
• Supply Voltage - Min: 1.72 V, 2.7 V, 3.13 V

1. Read: Anytime.
2.3.80
Freescale Semiconductor
DDR1AD1
Address 0x027B
Write: Anytime.
Field
Reset
7-0
W
R
DDR1AD17
Port AD1 data direction—
This register controls the data direction of pins 7 through 0.
1 Associated pin is configured as output.
0 Associated pin is configured as input.
Port AD1 Data Direction Register 1 (DDR1AD1)
0
7
Due to internal synchronization circuits, it can take up to 2 bus clock cycles
until the correct value is read on PT0AD1 registers, when changing the
DDR0AD1 register.
To use the digital input function on Port AD1 the ATD Digital Input Enable
Register (ATD1DIEN1) has to be set to logic level “1”.
Due to internal synchronization circuits, it can take up to 2 bus clock cycles
until the correct value is read on PT0AD1 registers, when changing the
DDR1AD1 register.
To use the digital input function on Port AD1 the ATD Digital Input Enable
Register (ATD1DIEN1) has to be set to logic level “1”.
DDR1AD16
Figure 2-78. Port AD1 Data Direction Register 1 (DDR1AD1)
0
6
Table 2-76. DDR1AD1 Register Field Descriptions
MC9S12XE-Family Reference Manual Rev. 1.25
DDR1AD15
0
5
DDR1AD14
NOTE
NOTE
NOTE
NOTE
0
4
Description
DDR1AD13
3
0
Chapter 2 Port Integration Module (S12XEPIMV1)
DDR1AD12
0
2
DDR1AD11
Access: User read/write
0
1
DDR1AD10
0
0
161
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