S912XET256J2VAGR Freescale Semiconductor, S912XET256J2VAGR Datasheet - Page 836

• Manufacturer Part Number: S912XET256J2VAGR
• Description: 16-bit Microcontrollers - MCU Watchdog OSC/Timer -40 C to + 105 C HCS12X MCU SPI
• Manufacturer: Freescale Semiconductor

Specifications of S912XET256J2VAGR

• Core: HCS12X
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 256 KB
• Data Ram Size: 16 KB
• On-chip Adc: Yes
• Package / Case: LQFP
• Mounting Style: SMD/SMT
• A/d Bit Size: 12 bit
• A/d Channels Available: 24
• Interface Type: CAN, SCI, SPI
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 119
• Number Of Timers: 25
• Program Memory Type: Flash
• Supply Voltage - Max: 1.98 V, 2.9 V, 5.5 V
• Supply Voltage - Min: 1.72 V, 2.7 V, 3.13 V

Chapter 24 128 KByte Flash Module (S12XFTM128K2V1)
24.3
This section describes the memory map and registers for the Flash module. Read data from unimplemented
memory space in the Flash module is undefined. Write access to unimplemented or reserved memory space
in the Flash module will be ignored by the Flash module.
24.3.1
The S12X architecture places the P-Flash memory between global addresses 0x78_0000 and 0x7F_FFFF
as shown in
The FPROT register, described in
accidental program or erase. Three separate memory regions, one growing upward from global address
0x7F_8000 in the Flash memory (called the lower region), one growing downward from global address
0x7F_FFFF in the Flash memory (called the higher region), and the remaining addresses in the Flash
memory, can be activated for protection. The Flash memory addresses covered by these protectable regions
are shown in the P-Flash memory map. The higher address region is mainly targeted to hold the boot loader
code since it covers the vector space. Default protection settings as well as security information that allows
the MCU to restrict access to the Flash module are stored in the Flash configuration field as described in
Table
836
0x7F_FF00 – 0x7F_FF07
24-3.
Global Address
0x7F_FF0B
0x7F_FF08 –
0x7F_FF0C
0x7F_FF0D
0x7F_FF0E
Memory Map and Registers
Module Memory Map
Table
(2)
0x7F_0000 – 0x7F_FFFF
0x79_0000 – 0x7E_FFFF
0x78_0000 – 0x78_FFFF
2
2
2
24-2. The P-Flash memory map is shown in
Global Address
(Bytes)
Size
8
4
1
1
1
MC9S12XE-Family Reference Manual Rev. 1.25
Table 24-2. P-Flash Memory Addressing
Table 24-3. Flash Configuration Field
Section
Backdoor Comparison Key
Refer to
Section 24.5.1, “Unsecuring the MCU using Backdoor Key
Reserved
P-Flash Protection byte
Refer to
EEE Protection byte
Refer to
Flash Nonvolatile byte
Refer to
24.3.2.9, can be set to protect regions in the Flash memory from
(Bytes)
384 K
Section 24.4.2.11, “Verify Backdoor Access Key
Section 24.3.2.9, “P-Flash Protection Register (FPROT)”
Section 24.3.2.10, “EEE Protection Register (EPROT)”
Section 24.3.2.14, “Flash Option Register (FOPT)”
Size
64 K
64 K
P-Flash Block 0
Contains Flash Configuration Field
(see
No P-Flash Memory
P-Flash Block 1
Table
.
24-3)
Figure
Description
Description
(1)
24-2.
Command,” and
Freescale Semiconductor
Access”