SAM9M10 Atmel Corporation, SAM9M10 Datasheet - Page 808
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SAM9M10
Manufacturer Part Number
SAM9M10
Description
Manufacturer
Atmel Corporation
Datasheets
1.M40800.pdf
(284 pages)
2.SAM9261.pdf
(248 pages)
3.SAM9M10.pdf
(59 pages)
4.SAM9M10.pdf
(1398 pages)
Specifications of SAM9M10
Flash (kbytes)
0 Kbytes
Pin Count
324
Max. Operating Frequency
400 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
160
Ext Interrupts
160
Usb Transceiver
3
Usb Speed
Hi-Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
2
Uart
5
Lin
4
Ssc
2
Ethernet
1
Sd / Emmc
2
Graphic Lcd
Yes
Video Decoder
Yes
Camera Interface
Yes
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
440
Resistive Touch Screen
Yes
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
64
Self Program Memory
NO
External Bus Interface
2
Dram Memory
DDR2/LPDDR, SDRAM/LPSDR
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
0.9 to 1.1
Fpu
No
Mpu / Mmu
No / Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
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SAM9M10
Thus the USB Host peripheral receives three clocks from the Power Management Controller
(PMC): the Peripheral Clock (MCK domain), the UHP48M and the UHP12M (built-in UHP48M
divided by four) used by the OHCI to interface with the bus USB signals (Recovered 12 MHz
domain) in Full-speed operations.
For High-speed operations, the user has to perform the following:
For OHCI Full-speed operations only, the user has to perform the following:
• Enable UHP peripheral clock, bit (1 << AT91C_ID_UHPHS) in PMC_PCER register.
• Write CKGR_PLLCOUNT field in PMC_UCKR register.
• Enable UPLL, bit AT91C_CKGR_UPLLEN in PMC_UCKR register.
• Wait until UTMI_PLL is locked. LOCKU bit in PMC_SR register
• Enable BIAS, bit AT91C_CKGR_BIASEN in PMC_UCKR register.
• Select UPLLCK as Input clock of OHCI part, USBS bit in PMC_USB register.
• Program the OHCI clocks (UHP48M and UHP12M) with USBDIV field in PMC_USB register.
• Enable OHCI clocks, UHP bit in PMC_SCER register.
• Enable UHP peripheral clock, bit (1 << AT91C_ID_UHPHS) in PMC_PCER register.
• Select PLLACK as Input clock of OHCI part, USBS bit in PMC_USB register.
• Program the OHCI clocks (UHP48M and UHP12M) with USBDIV field in PMC_USB register.
• Enable the OHCI clocks, UHP bit in PMC_SCER register.
USBDIV must be 9 (division by 10) if UPLLCK is selected.
USBDIV value is to calculated regarding the PLLACK value and USB Full-speed accuracy.
6355D–ATARM–7-Sep-11
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