SAM9M10 Atmel Corporation, SAM9M10 Datasheet - Page 1197
SAM9M10
Manufacturer Part Number
SAM9M10
Description
Manufacturer
Atmel Corporation
Datasheets
1.M40800.pdf
(284 pages)
2.SAM9261.pdf
(248 pages)
3.SAM9M10.pdf
(59 pages)
4.SAM9M10.pdf
(1398 pages)
Specifications of SAM9M10
Flash (kbytes)
0 Kbytes
Pin Count
324
Max. Operating Frequency
400 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
160
Ext Interrupts
160
Usb Transceiver
3
Usb Speed
Hi-Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
2
Uart
5
Lin
4
Ssc
2
Ethernet
1
Sd / Emmc
2
Graphic Lcd
Yes
Video Decoder
Yes
Camera Interface
Yes
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
440
Resistive Touch Screen
Yes
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
64
Self Program Memory
NO
External Bus Interface
2
Dram Memory
DDR2/LPDDR, SDRAM/LPSDR
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
0.9 to 1.1
Fpu
No
Mpu / Mmu
No / Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
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46.7.2
Name:
Address:
Access:
• DE: Decoder Enable
0: Disables Decoder.
1: Enables Decoder.
Setting this bit high will start the decoding operation. Hardware will reset this bit when a picture is processed, a stream error
or ASO is detected or a bus error is received.
• ID: Interrupt Disable
0: Enables Interrupts for decoder.
1: Disables Interrupts for decoder.
When high, there will be no interrupts issued by the decoder. Polling must be used to see the hardware status.
• ISET: Decoder Interrupt Set
0:Clears the decoder interrupt.
Software will reset this after the interrupt is handled.
1: Set the decoder interrupt.
This bit drives the interrupt line, OR gated with the post-processor interrupt bit. The interrupt line is not used for the decoder
if the interrupt disable bit for decoder is high.
• DR: Decoder Ready
0: Decoding in progress.
1: Decoder is ready.
When high, the hardware has decoded a picture. Hardware will self-reset.
• BE: Bus Error
0: No error.
1: A bus error has occurred.
When high, hardware has received an error response from the bus while accessing external memory. This is a fatal error
possibly caused by the incorrect allocation of decoder linear memory. Hardware will self-reset.
6355D–ATARM–7-Sep-11
ASOD
31
23
15
–
–
7
–
Decoder Interrupt Register
SBE
30
22
14
VDEC_DIR
0x00900004
Read-write
–
–
6
–
BE
29
21
13
–
–
5
–
DR
28
20
12
ID
–
–
4
27
19
11
–
–
–
3
–
TO
26
18
10
–
–
2
–
JPEGSD
25
17
–
9
–
1
–
SAM9M10
ISET
ISE
DE
24
16
–
8
0
1197
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