SAM9M10 Atmel Corporation, SAM9M10 Datasheet - Page 264

• Manufacturer Part Number: SAM9M10
• Manufacturer: Atmel Corporation

Specifications of SAM9M10

• Flash (kbytes): 0 Kbytes
• Pin Count: 324
• Max. Operating Frequency: 400 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 160
• Ext Interrupts: 160
• Usb Transceiver: 3
• Usb Speed: Hi-Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 2
• Uart: 5
• Lin: 4
• Ssc: 2
• Ethernet: 1
• Sd / Emmc: 2
• Graphic Lcd: Yes
• Video Decoder: Yes
• Camera Interface: Yes
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 440
• Resistive Touch Screen: Yes
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 64
• Self Program Memory: NO
• External Bus Interface: 2
• Dram Memory: DDR2/LPDDR, SDRAM/LPSDR
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 0.9 to 1.1
• Fpu: No
• Mpu / Mmu: No / Yes
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

Note: This field is found only in DDR2-SDRAM devices.
• EBISHARE: External Bus Interface is Shared
The DDR controller embedded in the EBI is used at the same time as another memory controller (SMC,..)
Reset value is 0.
0 = Only the DDR controller function is used.
1 = The DDR controller shares the EBI with another memory controller (SMC, NAND,..)
• ACTBST: ACTIVE Bank X to Burst Stop Read Access Bank Y
Reset value is 0.
0 = After an ACTIVE command in Bank X, BURST STOP command can be issued to another bank to stop current read
access.
1 = After an ACTIVE command in Bank X, BURST STOP command cannot be issued to another bank to stop current read
access.
This field is unique to SDR-SDRAM, Low-power SDR-SDRAM and Low-power DDR1-SDRAM devices.
264
264
OCD
000
111
SAM9M10
SAM9M10
OCD calibration mode exit, maintain setting
OCD calibration default
6355D–ATARM–7-Sep-11
6355D–ATARM–7-Sep-11